Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations

Abstract

We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the first part of this paper, adders and exponential function modules are presented first and secondly. By utilizing the two modules, several transcendental functions including hyperbolic and logarithmic functions are constructed. The exponential functions and logarithmic functions provide log-domain arithmetic operations including multiplication, division, and power functions. Only two bit-manipulations, bit-permutation with sorting networks and bit-reversal with NOT gates, have built up all the arithmetic operations on any form of sigma-delta modulated signals. These modules, together with algebraic functions to be presented in the second part of this paper, organize an extensive module library for the sigma-delta domain signal processing.

Sigma-delta domain bandpass and band-elimination wave filters

“…The binary sorting network is built of AND-OR gate pairs or linear threshold gates (LTG) as shown in Fig. 3(a) or (b) [12]. The input and the output signals, x(n) (j) and y(n), are (A + 1) and (L + 1)-level first-order SD modulated signals, respectively.…”

“…Sigma-delta domain signal processing (SDSP) is a scheme that allows quantum effect circuits to inherit analog circuit design properties and acquire tolerance of transient device errors [9]. The inheritance makes it possible to construct a wide range of SDSP circuit library including four arithmetic circuits [9][10][11][12], algebraic and transcendental function circuits [9,12,13], and piecewise linear circuits [14]. All of inputs, outputs, and internal signals of SDSP circuits are in sigma-delta (SD) modulated bit-stream form [15,16].…”

Hardware-Efficient Delta Sigma-Based Digital Signal Processing Circuits for the Internet-of-Things

“…This is because when adding more addends, it only requires a linear increase in the size of the counter and memory. Therefore, the complexity of the proposed Delta Sigma adder circuits of N inputs is Θ(N), which is better than Θ(N 2 ) when circuits using sorting networks are applied [13]. Furthermore, compared to multi-bit binary adders, the proposed Delta Sigma adder can take addends at different clock rates, as long as the adder clock is equal to or faster than the highest clock rate among all addends.…”

“…Second, in the Delta Sigma domain, the instantaneous analog value is represented by the moving average of the Delta Sigma bit-stream. Therefore, a few bit errors in the bit-stream do not disturb the signal level greatly [13]. Therefore, Delta Sigma systems have a higher tolerance to bit errors than multi-bit binary systems, which means Delta Sigma systems have higher reliability.…”

“…One method of processing higher order Delta Sigma bit-streams is the digital Delta Sigma modulator proposed. However, a digital Delta Sigma modulator designed with a complicated sorting network [13] requires enormous circuit resources, which is not applicable for low-power devices.…”