Some Computer Organizations and Their Effectiveness

Flynn, Michael J.

doi:10.1109/tc.1972.5009071

Cited by 1,264 publications

(450 citation statements)

References 17 publications

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“…We assume that each memory access request is completed when it reaches the last pipeline stage. Two warps W(0) and W(1) access to m [7], m [5], m [15], m [0] and m [10], m [11], m [12], m [9] , respectively. In the DMM, memory access requests by W(0) are separated into two pipeline stages, because addresses m [7] and m [15] are in the same bank B (3).…”

Section: Parallel Memory Machines: Dmm and Ummmentioning

confidence: 99%

“…We do not discuss the architecture of the sea of threads in this paper, Copyright c 2013 The Institute of Electronics, Information and Communication Engineers but we can imagine that it consists of a set of multi-core processors which can execute many threads in parallel. Threads are executed in SIMD [15] fashion, and the processors run on the same program and work on the different data.…”

Section: Introductionmentioning

confidence: 99%

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Optimal Parallel Algorithms for Computing the Sum, the Prefix-Sums, and the Summed Area Table on the Memory Machine Models

Nakano

2013

IEICE Trans. Inf. & Syst.

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SUMMARYThe main contribution of this paper is to show optimal parallel algorithms to compute the sum, the prefix-sums, and the summed area table on two memory machine models, the Discrete Memory Machine (DMM) and the Unified Memory Machine (UMM). The DMM and the UMM are theoretical parallel computing models that capture the essence of the shared memory and the global memory of GPUs. These models have three parameters, the number p of threads, and the width w of the memory, and the memory access latency l. We first show that the sum of n numbers can be computed in O( n w + nl p + l log n) time units on the DMM and the UMM. We then go on to show that Ω( n w + nl p + l log n) time units are necessary to compute the sum. We also present a parallel algorithm that computes the prefix-sums of n numbers in O( n w + nl p + l log n) time units on the DMM and the UMM. Finally, we show that the summed area table of size √ n × √ n can be computed in O( n w + nl p + l log n) time units on the DMM and the UMM. Since the computation of the prefix-sums and the summed area table is at least as hard as the sum computation, these parallel algorithms are also optimal. key words: memory machine models, prefix-sums computation, parallel algorithm, GPU, CUDA

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Section: Parallel Memory Machines: Dmm and Ummmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Optimal Parallel Algorithms for Computing the Sum, the Prefix-Sums, and the Summed Area Table on the Memory Machine Models

Nakano

2013

IEICE Trans. Inf. & Syst.

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“…Their model is similar to Flynn"s requestor/server formalism [10]. It defines a computing machine (CM) as a doublet, consisting of a microprogram (P), and a set of resources (R); that is CM= (P, R).…”

Section: Related Workmentioning

confidence: 99%

A Model of Computer Architecture with Applications

Mutigwe¹,

Kinyua²,

Aghdasi³

2013

IJCTE

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I. INTRODUCTIONThe design of general-purpose computers has, until recently, been largely a qualitative exercise [1]. The work by Flynn [2] and Hennessy and Patterson [3] has helped start a reversal of that trend by putting the design of computers on a quantitative footing. Along those lines, in this work we propose to formalize the description of computer architectures. We develop a generic model for computing architecture that has the following three features. 1) Fidelity: The model accurately represents the structural parts of a given architecture and how they are related, while at the same time it allows for abstract computer models to represent the operations of these parts and their interactions. 2) Accessibility: The model is an intuitive, algebraic model that can be used by computer architects and other designers of digital systems with little training in formal mathematical methods. 3) Extensibility: The model can be used to model entire systems or the individual components of such systems. Our development of the model presented in this paper looks at both the static and dynamic aspects of a computers architecture. The static aspects are the associations between the components. While the dynamic aspects describe how the connected components interact in order to perform the computations.The rest of the paper is organized as follows. Section II describes some related work and defines some key terms.Manuscript

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“…A taxonomia de Flynn (FLYNN, 1972;FLYNN;RUDD, 1996), apresentada na Tabela 2.1, e uma das classificações mais utilizadas naárea da computação paralela. Basicamente, o autor se baseia em dois conceitos para criar sua organização: fluxos de instruções e fluxos de dados.…”

Section: Taxonomia De Flynnunclassified

“…Carnival (MEIRA; LEBLANC; POULOS, 1996)é uma ferramenta criada para realizar atividades de medição, análise e visualização de desempenho de programas que utilizam passagem de mensagem em máquinas do tipo SIMD (FLYNN, 1972). A ferramenta automatiza o processo de inferência utilizado para descobrir pontos de espera na aplicação.…”

Section: Carnivalunclassified

Uma metodologia para desenvolvimento de programas paralelos eficientes em ambientes homogêneos e heterogêneos.

Laine¹

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Some Computer Organizations and Their Effectiveness

Cited by 1,264 publications

References 17 publications

Optimal Parallel Algorithms for Computing the Sum, the Prefix-Sums, and the Summed Area Table on the Memory Machine Models

Optimal Parallel Algorithms for Computing the Sum, the Prefix-Sums, and the Summed Area Table on the Memory Machine Models

A Model of Computer Architecture with Applications

Uma metodologia para desenvolvimento de programas paralelos eficientes em ambientes homogêneos e heterogêneos.

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