Solving NoC mapping problem with improved particle swarm algorithm

Li, Zhengxue; Yang, Liu; Cheng, Mingsong

doi:10.1109/icaci.2013.6748466

Cited by 7 publications

(5 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Many types of heuristics, iterative improvement, probabilistic, integer linear and non-linear programming approaches and other types of algorithms can be adopted for NoC mapping [13]. In recent years, various algorithms for NoC mapping have emerged such as branch and bound, genetic algorithm (GA), simulated annealing (SA), particle swarm, Tabu search algorithm and so on [5,7,[14][15][16][17][18]. There are also some specialised algorithms for NoC mapping [2,8,19,20].…”

Section: Introductionmentioning

confidence: 99%

Unified multi‐objective mapping for network‐on‐chip using genetic‐based hyper‐heuristic algorithms

Liu

Yang

2018

IET Computers & Digital Techniques

View full text Add to dashboard Cite

In this study, a flexible energy-and delay-aware mapping approach is proposed for the co-optimisation of energy consumption and communication latency for network-on-chips (NoCs). A novel genetic-based hyper-heuristic algorithm (GHA) is proposed as the core algorithm. This algorithm consists of bottom-level optimisation which includes a variety of operators and top-level optimisation which selects suitable operators through a 'reward' mechanism. As this algorithm can select suitable operators automatically during the mapping process, it noticeably improves convergence speed and demonstrates excellent stability. Compared to the random algorithm, GHA can achieve on average 23.28% delay reduction and 11.81% power reduction. Compared to state-of-the-art mapping algorithms, GHA produces improved mapping results with less time, especially when the size of NoC is large.

show abstract

Section: Introductionmentioning

confidence: 99%

Unified multi‐objective mapping for network‐on‐chip using genetic‐based hyper‐heuristic algorithms

Liu

Yang

2018

IET Computers & Digital Techniques

View full text Add to dashboard Cite

show abstract

“…In this part, practical outcomes have been made available to indicate the benefit of the suggested plan. We compare the technique with two other procedures, namely, genetic and PSO (Li et al, 2013) using MATLAB software. Section 4.1 discusses the simulation tool.…”

Section: Resultsmentioning

confidence: 99%

“…In the modeling the architecture, the following quantities are considered as characteristic edge for each p i,j ; parameters such as number, type, speed, communications links and memory size. Mapping the tasks graph g = G(vertix, edge) to topology graph g 0 = G(tile, path) with the mapping function is determined (Li et al, 2013;Saifutdinova et al, 2016). Because of an APCG, IP collection and a CACG, which content IP # R, a mapping scheme MAP from APCG to CACG can be found, such that:…”

Section: Proposed Algorithmmentioning

confidence: 99%

Tasks mapping in the network on a chip using an improved optimization algorithm

Darbandi¹,

Ramtin

Sharafi

2020

IJPCC

View full text Add to dashboard Cite

Purpose A set of routers that are connected over communication channels can from network-on-chip (NoC). High performance, scalability, modularity and the ability to parallel the structure of the communications are some of its advantages. Because of the growing number of cores of NoC, their arrangement has got more valuable. The mapping action is done based on assigning different functional units to different nodes on the NoC, and the way it is done contains a significant effect on implementation and network power utilization. The NoC mapping issue is one of the NP-hard problems. Therefore, for achieving optimal or near-optimal answers, meta-heuristic algorithms are the perfect choices. The purpose of this paper is to design a novel procedure for mapping process cores for reducing communication delays and cost parameters. A multi-objective particle swarm optimization algorithm standing on crowding distance (MOPSO-CD) has been used for this purpose. Design/methodology/approach In the proposed approach, in which the two-dimensional mesh topology has been used as base construction, the mapping operation is divided into two stages as follows: allocating the tasks to suitable cores of intellectual property; and plotting the map of these cores in a specific tile on the platform of NoC. Findings The proposed method has dramatically improved the related problems and limitations of meta-heuristic algorithms. This algorithm performs better than the particle swarm optimization (PSO) and genetic algorithm in convergence to the Pareto, producing a proficiently divided collection of solving ways and the computational time. The results of the simulation also show that the delay parameter of the proposed method is 1.1 per cent better than the genetic algorithm and 0.5 per cent better than the PSO algorithm. Also, in the communication cost parameter, the proposed method has 2.7 per cent better action than a genetic algorithm and 0.16 per cent better action than the PSO algorithm. Originality/value As yet, the MOPSO-CD algorithm has not been used for solving the task mapping issue in the NoC.

show abstract

“…To verify the validity of the mapping algorithm we proposed, the simulated annealing algorithm [21], particle swarm algorithm [22], and genetic algorithm [23] are implemented, respectively. For fair comparison, the same power and delay models described in Subsection 3.2 are used.…”

Section: Resultsmentioning

confidence: 99%

An intelligent partitioning approach of the system-on-chip for flexible and stretchable systems

Liu

Yang

2018

Sci. China Inf. Sci.

View full text Add to dashboard Cite

In this paper, we propose an intelligent partitioning approach of the system-on-chip (SoC) to improve the bendability and stretchability of flexible and stretchable systems. The proposed approach partitions the SoC intelligently into clusters of functional modules according to the communication flows and area constraint. Based on the communication volume between clusters, a heuristic algorithm is applied to map these clusters onto the 2D mesh network-on-chip (NoC) for co-optimization of communication energy and delay. Experimental results show that our approach can effectively partition the SoC into small ICs of the same size. The approach also reduces power consumption and communication delay by 10.64%-56.63% and 15.06%-50.30%, respectively.

show abstract

Solving NoC mapping problem with improved particle swarm algorithm

Cited by 7 publications

References 2 publications

Unified multi‐objective mapping for network‐on‐chip using genetic‐based hyper‐heuristic algorithms

Unified multi‐objective mapping for network‐on‐chip using genetic‐based hyper‐heuristic algorithms

Tasks mapping in the network on a chip using an improved optimization algorithm

An intelligent partitioning approach of the system-on-chip for flexible and stretchable systems

Contact Info

Product

Resources

About