Software Modification Aided Transient Error Tolerance for Embedded Systems

Abstract

Abstract-Commercial off-the-shelf (COTS) components are increasingly being employed in embedded systems due to their high performance at low cost. With emerging reliability requirements, design of these components using traditional hardware redundancy incur large overheads, timedemanding re-design and validation. To reduce the design time with shorter time-to-market requirements, softwareonly reliable design techniques can provide with an effective and low-cost alternative. This paper presents a novel, architecture-independent software modification tool, SMART (Software Modification Aided transient eRror Tolerance) for effective error detection and tolerance. To detect transient errors in processor datapath, control flow and memory at reasonable system overheads, the tool incorporates selective and non-intrusive data duplication and dynamic signature comparison. Also, to mitigate the impact of the detected errors, it facilitates further software modification implementing software-based check-pointing. Due to automatic software based source-to-source modification tailored to a given reliability requirement, the tool requires no re-design effort, hardware-or compiler-level intervention. We evaluate the effectiveness of the tool using a Xentium R processor based system as a case study of COTS based systems. Using various benchmark applications with single-event upset (SEUs) based error model, we show that up to 91% of the errors can be detected or masked with reasonable performance, energy and memory footprint overheads.

DeSyRe: On-demand system reliability

“…8) are designed with self-testing capability to ensure fault-free testing mechanism. More detailed description of the Xentium online testing mechanism is described in [26].…”

“…To demonstrate the effectiveness of the modified software description, initially full data duplication with U NT = 0 is assumed. For each application, an approximate total of 5000 transient errors are injected in consecutive runs using single-event upset (SEU) based model (for fault injection details, see [26]). An arbitrary error probability of 10…”