Software-Distributed Shared Memory over Heterogeneous Micro-server Architecture

Euro-Par 2019: Parallel Processing Workshops

Bennour

2020

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Nowadays, high-performance computing (HPC) not only faces challenges to reach computing performance, it also has to take in consideration the energy consumption. In this context, heterogeneous architectures are expected to tackle this challenge by proposing a mix of HPC and low-power nodes. There is a significant research effort to define methods for exploiting such computing platforms and find a trade-off between computing performance and energy consumption. To this purpose, the topology of the application and the mapping of tasks onto physical resources are of major importance. In this paper we propose an iterative approach based on the exploration of logical topologies and mappings. These solutions are executed onto the heterogeneous platform and evaluated. Based on these results a Pareto front is built, allowing users to select the most relevant configurations of the application according to the current goals and constraints. Experiments have been conducted on a heterogeneous micro-server using a video processing application running on top of a software-distributed shared memory and deployed over a mix of Intel i7 and Arm Cortex A15 processors. Results show that some counterintuitive solutions found by the exploration approach perform better than classical configurations.

Section: Topology For Dsmmentioning

confidence: 99%

Section: Heterogeneous Platformmentioning

confidence: 99%

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Application Topology Definition and Tasks Mapping for Efficient Use of Heterogeneous Resources

Trabelsi

Euro-Par 2019: Parallel Processing Workshops

Bennour

2020

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“…We consider the following S‐DSM 11 in which coherence protocols are implemented as finite‐state automata, with most of the transitions occurring on message reception. In this context, processes that run automata might spend a significant time waiting for messages, depending on the shared memory access patterns.…”

Section: Adaptive Sleep Time In S‐dsmmentioning

confidence: 99%

Adaptive message passing polling for energy efficiency: Application to software‐distributed shared memory over heterogeneous computing resources

Concurrency and Computation

2020

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Autonomous vehicles, smart manufacturing, heterogeneous systems, and new high-performance embedded computing (HPEC) applications can benefit from the reuse of code coming from the high-performance computing world. However, unlike for HPC, energy efficiency is critical in embedded systems, especially when running on battery power. Code base from HPC mostly relies on the message passing interface (MPI) message passing runtime to deal with distributed systems. MPI has been designed primarily for performance and not for energy efficiency. One drawback is the way messages are received, in an energy-consuming busy-wait fashion. In this work, we study a simple approach in which receiving processes are put to sleep instead of constantly polling. We implement this strategy at the user level to be transparent to the MPI runtime and the application. Experiments are conducted with OpenMPI, MPICH, and MPC, using a video processing application and a software-distributed shared memory system deployed over two heterogeneous platforms, including the Christmann RECS|Box Antares Microserver. Results show significant energy savings. In some particular cases involving process colocation, we also observe better performance using our strategy which can be explained by a better sharing of the computing resource.

“…In a previous work [9], a S-DSM is proposed for heterogeneous distributed architectures such as micro-servers. This system allows tasks to allocate and access memory in a shared logical space.…”

Section: Shared Memory Synchronization Objects and Eventsmentioning

confidence: 99%

Merging the Publish-Subscribe Pattern with the Shared Memory Paradigm

Lecture Notes in Computer Science

2018

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Heterogeneous distributed architectures require high-level abstractions to ease the programmability and efficiently manage resources. Both the publish-subscribe and the shared memory models offer such abstraction. However they are intended to be used in different application contexts. In this paper we propose to merge these two models into a new one. It benefits from the rigorous cache coherence management of the shared memory and the ability to cope with dynamic large-scale environment of the publish-subscribe model. The publish-subscribe mechanisms have been implemented within a distributed shared memory system and tested using an heterogeneous micro-server.