Software-Based Mitigation for Memory Address Decoder Aging

Abstract

Integrated circuits typically contain design margins to compensate for aging. As aging impact increases with technology scaling, bigger margins are necessary to achieve the desired reliability. However, these increased margins lead to a reduced performance and lower yield. Alternatively, mitigation schemes can be deployed to reduce the aging. This paper proposes a software-based method to mitigate the aging of the memory's address decoder logic due to Bias Temperature Instability. The method is based on periodically applying a rejuvenation application on top of a user application. The goal of the rejuvenation application is to recover aged transistors of the critical paths of the address decoder. The experimental results show that the proposed method significantly reduces aging in cases when applications consist of memory access patterns that result in an unbalanced stress in the address decoder logic. In particular, it reduces the degradation of the address decoder's setup delay by up to 43% with an execution overhead of only 1%.

On BTI Aging Rejuvenation in Memory Address Decoders

“…Furthermore, depending on the given workload, some paths have higher delay increase due to aging than others. As in [17], we aim to mitigate aging by changing the workload that affects the memory. This change is done by executing an dedicated small auxiliary workload periodically.…”

“…In this study, we rely on the accurate combined model for Negative BTI in PMOS and Positive BTI in NMOS transistors proposed in [19] for the 28 nm technology and calibrated for 22 nm Predictive Technology Model (PTM) technology as explained in [17]. The resulting dependency of the BTI-induced threshold voltage (Vth) shift depending on the average duty factor (the probability of a transistor to be on) for NMOS and PMOS is presented in Fig.…”

“…Depending on the workload different addresses are selected and therefore different input combinations are applied to the decoder. Thus, a path's delay increase can be manipulated by workloads which run during memories operation [17].…”

“…• Universal: This rejuvenation workload sequentially selects all addresses for equal amount of clock cycles as in [17]. This is the simplest workload out of the three, and can be generated without any analysis of decoder design or memory access trace.…”

“…To the best of our knowledge, there are only two works that target address decoders. The authors of [17] introduce a software-based scheme that mitigates aging by periodically running a rejuvenation workload on top of a user workload. However, it does not provide a method to run the scheme, analyzes simplistic workloads and only targets the Negative BTI (NBTI) aging mechanism.…”