Soft errors in commercial off-the-shelf static random access memories

Kettunen

et al. 2021

IEEE Trans. Nucl. Sci.

Section: Tested Components and Experimental Proceduresmentioning

confidence: 99%

Electron-Induced Upsets and Stuck Bits in SDRAMs in the Jovian Environment

Söderström

Kettunen

et al. 2021

IEEE Trans. Nucl. Sci.

“…Based on the research group activities, several types of memories were already exposed to different radiation sources. In [18], the authors review the techniques and results of several radiation test campaigns on two commercial SRAMs (90 nm and 65 nm) technology nodes. Moreover, the effects on a SLC (Single Level Cell) NAND Flash under heavy-ions and proton irradiation were evaluated in [19].…”

Section: B Fault Model Evaluationmentioning

confidence: 99%

A Model-Based Framework to Assess the Reliability of Safety-Critical Applications

2021 24th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems (DDECS)

Ruospo

Bosio

et al. 2021

Solutions based on artificial intelligence and brain-inspired computations like Artificial Neural Networks (ANNs) are suited to deal with the growing computational complexity required by state-of-the-art electronic devices. Many applications that are being deployed using these computational models are considered safety-critical (e.g., self-driving cars), producing a pressing need to evaluate their reliability. Besides, state-of-the-art ANNs require significant memory resources to store their parameters (e.g., weights, activation values), which goes outside the possibility of many resourceconstrained embedded systems. In this light, Approximate Computing (AxC) has become a significant field of research to improve memory footprint, speed, and energy consumption in embedded and high-performance systems. The use of AxC can significantly reduce the cost of ANN implementations, but it may also reduce the inherent resiliency of this kind of application. On this scope, reliability assessments are carried out by performing fault injection test campaigns. The intent of the paper is to propose a framework that, relying on the results of radiation tests in Commercial-Off-The-Shelf (COTS) devices, is able to assess the reliability of a given application. To this end, a set of different radiation-induced errors in COTS memories is presented. Upon these, specific fault models are extracted to drive emulation-based fault injections.

“…Dynamic tests were done with either a modified March C-test or dynamic stress test, with read and write operations during irradiation. In the modified March C-test [8] data was written to and read from the memory so that the pattern was alternately all '0' and all '1', and the memory was read (r ) and written (w) with alternately increasing (↑) and decreasing (↓) address access order, see (1). The modification from a normal March C-test compared to what was done here was that the first ↑ (w0) operation only was performed the first cycle.…”

Section: Experimental Set-up and Proceduresmentioning

confidence: 99%

“…Similarly the dynamic stress test schema [8] can be seen in ( 2), where the first test cycle starts with a ↑ (w1) operation which is excluded in the following cycles. Here all the operations listed in one row in ( 2) are performed at one address location at a time, before stepping up or down to the following address location.…”

Section: Experimental Set-up and Proceduresmentioning

confidence: 99%

Stuck and Weakened Bits in SDRAM from a Heavy-Ion Microbeam

Söderström

2019 19th European Conference on Radiation and Its Effects on Components and Systems (RADECS)

Bosser

et al. 2019

Stuck and weakened bits in the ISSI 512 Mb SDRAM was investigated in irradiation experiments with a heavy ion microbeam in the GSI facility. Delidded memories were tested in gold and calcium ion beams at 4.8 MeV/u, and stuck bits in the memory from the irradiation were investigated. To study weakened but not fully stuck bits after irradiation, parameters such as the refresh frequency of the memories was varied. The effect on the number of stuck bits from reading and writing the memory was studied, as well as the effect from waiting a time span between writing and reading the memory. These parameters were found to matter in the observed number of errors in the memory. Data on the findings from the microbeam irradiation from tests with different test modes are presented in this paper regarding suck bits and bit upsets. The test modes include dynamic March test and data retention tests with only refresh operations during irradiation.