Smart Thermal Management for Heterogeneous Multicores

Henkel, Jörg; Khdr, Heba; Rapp, Martin

doi:10.23919/date.2019.8715001

Cited by 9 publications

(9 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Due to the elevated on-chip temperatures, many research efforts have been made to control the power and the temperature of the multi-core chip at the system level, e.g., [123]- [128]. A large body of these techniques has enforced temperature constraints within the task mapping decisions while aiming at maximizing the performance.…”

Section: Thermal-aware Fault-tolerance Techniquesmentioning

confidence: 99%

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

et al. 2022

Self Cite

View full text Add to dashboard Cite

The relentless technology scaling has provided a significant increase in processor performance, but on the other hand, it has led to adverse impacts on system reliability. In particular, technology scaling increases the processor susceptibility to radiation-induced transient faults. Moreover, technology scaling with the discontinuation of Dennard scaling increases the power densities, thereby temperatures, on the chip. High temperature, in turn, accelerates transistor aging mechanisms, which may ultimately lead to permanent faults on the chip. To assure a reliable system operation, despite these potential reliability concerns, fault-tolerance techniques have emerged. Specifically, fault-tolerance techniques employ some kind of redundancies to satisfy specific reliability requirements. However, the integration of fault-tolerance techniques into real-time embedded systems complicates preserving timing constraints. As a remedy, many task mapping/scheduling policies have been proposed to consider the integration of fault-tolerance techniques and enforce both timing and reliability guarantees for real-time embedded systems. More advanced techniques aim additionally at minimizing power and energy while at the same time satisfying timing and reliability constraints. Recently, some scheduling techniques have started to tackle a new challenge, which is the temperature increase induced by employing fault-tolerance techniques. These emerging techniques aim at satisfying temperature constraints besides timing and reliability constraints. This paper provides an in-depth survey of the emerging research efforts that exploit fault-tolerance techniques while considering timing, power/energy, and temperature from the real-time embedded systems' design perspective. In particular, the task mapping/scheduling policies for fault-tolerance real-time embedded systems are reviewed and classified according to their considered goals and constraints. Moreover, the employed fault-tolerance techniques, application models, and hardware models are considered as additional dimensions of the presented classification. Lastly, this survey gives deep insights into the main achievements and shortcomings of the existing approaches and highlights the most promising ones.INDEX TERMS Fault-tolerance, embedded systems, real-time computing, scheduling, power/energy minimization, thermal-aware design.

show abstract

Section: Thermal-aware Fault-tolerance Techniquesmentioning

confidence: 99%

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

et al. 2022

Self Cite

View full text Add to dashboard Cite

show abstract

“…Using these knobs without considering the application characteristics misses significant optimization opportunities and may degrade the QoS of the applications, thereby also degrading the user experience [5]. The reason is that the impact on performance and power when migrating an application between clusters differs from one application to another [6]. Similarly, the sensitivities of performance and power to DVFS also vary.…”

Section: Introductionmentioning

confidence: 99%

NPU-Accelerated Imitation Learning for Thermal Optimization of QoS-Constrained Heterogeneous Multi-Cores

Rapp¹,

Khdr²,

Krohmer³

et al. 2022

Preprint

Self Cite

View full text Add to dashboard Cite

Application migration and dynamic voltage and frequency scaling (DVFS) are indispensable means for fully exploiting the available potential in thermal optimization of a heterogeneous clustered multi-core processor under user-defined quality of service (QoS) targets. However, selecting the core to execute each application and the voltage/frequency (V/f) levels of each cluster is a complex problem because 1) the diverse characteristics and QoS targets of applications require different optimizations, and 2) per-cluster DVFS requires a global optimization considering all running applications. State-of-the-art resource management techniques for power or temperature minimization either rely on measurements that are often not available (such as power) or fail to consider all the dimensions of the problem (e.g., by using simplified analytical models). Imitation learning (IL) enables to use the optimality of an oracle policy, yet at low run-time overhead, by training a model from oracle demonstrations. We are the first to employ IL for temperature minimization under QoS targets. We tackle the complexity by training a neural network (NN) and accelerate the NN inference using a neural processing unit (NPU). While such NN accelerators are becoming increasingly widespread on end devices, they are so far only used to accelerate user applications. In contrast, we use an existing accelerator on a real platform to accelerate NN-based resource management. Our evaluation on a HiKey 970 board with an Arm big.LITTLE CPU and an NPU shows significant temperature reductions at a negligible run-time overhead, with unseen applications and different cooling than used for training.

show abstract

“…Addition to this, some of the researchers have proposed proactive thermal management techniques as mentioned in refs. [16][17][18][19][20][21][22][23] to maintain the operating temperature below given threshold temperature limit. Ganapati Bhat et al [16] proposed predictive power and thermal model-based proactive thermal management technique utilising the on-demand frequency governors.…”

Section: Introductionmentioning

confidence: 99%

Machine learning guided thermal management of Open Computing Language applications on CPU‐GPU based embedded platforms

Kumar

Ghoshal

2022

IET Computers & Digital Tech

View full text Add to dashboard Cite

As embedded devices start supporting heterogeneous processing cores (Central Processing Unit [CPU]–Graphical Processing Unit [GPU] based cores), performance aware task allocation becomes a major issue. Use of Open Computing Language (OpenCL) applications on both CPU and GPU cores improves performance and resolves the problem. However, it has an adverse effect on the overall power consumption and the operating temperature of the system. Operating both kind of cores within a small form factor at high frequency causes rise in power consumption which in turn leads to increase in processor temperature. The elevated temperature brings about major thermal issues. In this paper, we present our investigation on the role of CPU during execution of GPU specific application and argue against running it at the high frequency. In addition, a machine learning guided mechanism to predict the optimal operating frequency of CPU cores during execution of OpenCL GPU kernels is presented in this study. Our experiments with OpenCL applications on the state of the art ODROID XU4 embedded platform show that the CPU cores of the experimental board if operated at a frequency proposed by our Machine Learning‐based predictive method brings about 12.5°C reduction in processor temperature at 1.06% degradation in performance compared to the baseline frequency (default performance frequency governor of the embedded platform).

show abstract

Smart Thermal Management for Heterogeneous Multicores

Cited by 9 publications

References 19 publications

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

NPU-Accelerated Imitation Learning for Thermal Optimization of QoS-Constrained Heterogeneous Multi-Cores

Machine learning guided thermal management of Open Computing Language applications on CPU‐GPU based embedded platforms

Contact Info

Product

Resources

About