Smart integration of silicon nanowire arrays in all-silicon thermoelectric micro-nanogenerators

Abstract

Micro and nanotechnologies are called to play a key role in the fabrication of small and low cost sensors with excellent performance enabling new continuous monitoring scenarios and distributed intelligence paradigms (Internet of Things, Trillion Sensors). Harvesting devices providing energy autonomy to those large numbers of microsensors will be essential. In those scenarios where waste heat sources are present, thermoelectricity will be the obvious choice. However, miniaturization of state of the art thermoelectric modules is not easy with the current technologies used for their fabrication. Micro and nanotechnologies offer an interesting alternative considering that silicon in nanowire form is a material with a promising thermoelectric figure of merit. This paper presents two approaches for the integration of large numbers of silicon nanowires in a cost-effective and practical way using only micromachining and thin-film processes compatible with silicon technologies. Both approaches lead to automated physical and electrical integration of medium-high density stacked arrays of crystalline or polycrystalline silicon nanowires with arbitrary length (tens to hundreds microns) and diameters below 100 nm.

Enhanced thermoelectric figure of merit of individual Si nanowires with ultralow contact resistances

“…While other works reported more complex Si nanomaterials with higher doping and higher / (nano-bulk from [50,56] and nano-holes from [20,57]), to our knowledge, the present one is the first to report on the characterization of a nanomaterial which can be directly grown and integrated within MEMS using mature and scalable techniques. Other structures with remarkable performance also obtained by MEMScompatible procedures, like holey membranes, lack from a straightforward fabrication technique that allows to obtain them in suspended platforms [20], as is the case of the bottom-up NW arrays obtained in the present and related works [14][15][16][17]25,33]. References from other works reporting ZT vs T values for bulk (solid line [3]) and nanostructures (dashed lines [50,56]) are included.…”

“…In this work, we report the complete thermoelectric characterization (ZT) of p-type Si NWs epitaxially grown by a CVD bottom-up approach on silicon, which enables their direct integration and usage in functional micro-TEG devices [14,16,17,25]. Electrical (σ) and thermal () conductivities were measured in the very same single nanowire by using the DC selfheating method [26,27].…”

Active Control of Microstructure in Powder‐Bed Fusion Additive Manufacturing of Ti6Al4V

“…However, a much higher energy density is expected from new materials such as Silicon nanowire‐based modules, where a power density up to 6.6 × 10 3 W cm −2 is achievable . Indeed, Silicon‐nanowire TEM devices are being actively tested and developed …”

Thermoelectric harvesters and the internet of things: technological and economic drivers

“…Over the last years interesting examples of smart solutions to both issues have been reported in the literature. Use of bulk silicon frameworks with Si nanowires grown across facing sides of the framework were reported [13,14], largely overcoming the issue of fragility; and normal layouts with thinned substrates minimizing series thermal resistance were demonstrated [15]. In both cases, microTEGs operate converting relatively large heat fluxes (due to the small thermal areal resistance of micrometric-sized legs) into electric power over small temperature differences, since the proximity of the two heat sinks disables the establishment of temperature differences comparable to those used in standard TEGs.…”