2018 IEEE Applied Power Electronics Conference and Exposition (APEC) 2018
DOI: 10.1109/apec.2018.8341301
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Single phase universal input PFC converter operating at HF

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Cited by 10 publications
(5 citation statements)
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“…An increase in η res will reduce the minimum input resistance. Equations (21), (29) and (30) are inserted into (8) in order to determine the inverter duty cycle:…”
Section: Full Convertermentioning
confidence: 99%
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“…An increase in η res will reduce the minimum input resistance. Equations (21), (29) and (30) are inserted into (8) in order to determine the inverter duty cycle:…”
Section: Full Convertermentioning
confidence: 99%
“…Inserting (35) and (29) into (15) gives a simpler expression for the required load reactance seen from the inverter side.…”
Section: Full Convertermentioning
confidence: 99%
“…5. It is a two-input, single-output design that has been employed at the core of a high-powerdensity, high-frequency power factor correction converter [3]. Here we use the converter as a simple DAB converter.…”
Section: Experimental Verificationmentioning
confidence: 99%
“…5. DAB converter used for experimental verification of the model [3]. This converter has two primaries and a half bridge inverter on each primary.…”
Section: Experimental Verificationmentioning
confidence: 99%
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