Single-pair bulk-driven CMOS input stage: A compact low-voltage analog cell for scaled technologies

Modified telescopic amplifier with improved DC gain in 0.18 µm CMOS process

“…Hence, the linearity of the proposed amplifier is lower than that of the telescopic amplifier in the different output voltage swings. However, as mentioned before, using bulk amplification instead of the gate amplification in PFB improves the linearity of PFB and amplifier because of the higher linearity of the bulk amplification [6,7,[9][10][11]. Hence, in the same power consumption and output voltage swing, the linearity of proposed amplifier is better than that of the amplifier reported in [5], because in [5], gate-driven differential pairs are used in PFB structure which has lower linearity in comparison with bulk-driven differential pair.…”

0.5‐V bulk‐driven OTA and its applications

“…In order to obtain precise gain and phase characteristics at high frequencies, the non-dominant poles p 2 and p 3 , as well as both zeros of the transfer function (18) have to be located at much higher frequencies than f o (note that the RHP zero appears at a lower frequency than the left half-plane (LHP) one). In order to have poles p 2 and p 3 in LHP for integrator stability, the condition g 3 > > g 2 must always be satisfied.…”

“…The transfer function of the circuit of Figure 7(a), from each differential input to its output is described by equation (18). Since parasitic poles and zeros are located at much higher frequencies than the unitygain frequency f o , then the lossy integrator of Figure 7(b) is stable with a large stability margin.…”

“…One of the techniques which could facilitate the design of ultra‐low‐voltage OTAs and op‐amps is based on the application of bulk‐driven MOSFETs . In such solutions, the bulk terminal is used as an input rather than the gate.…”

A 0.8‐V supply bulk‐driven operational transconductance amplifier and Gm‐C filter in 0.18 µm CMOS process

“…Using bulk-driven transistors [15,16], flipped voltage follower cell [17], pseudo-differential pairs [18], floating gate approach, sub-threshold MOSFET [16], and level shifter are some design methods reported for reduced supply voltage analog circuits. Although these techniques ruin most of the OTAs characteristics, such as noise, linearity, open loop DC gain, unity gain bandwidth, and common mode rejection ratio, merging these methods is necessary for ultra low voltage designs.…”