“…Time to SEFI cross sections will be calculated. We have seen a notable difference in performance between the external scrubber and the internal scrubber within the FX60 Power PC tests performed by our group [8]. More data is currently being analyzed.…”
“…Time to SEFI cross sections will be calculated. We have seen a notable difference in performance between the external scrubber and the internal scrubber within the FX60 Power PC tests performed by our group [8]. More data is currently being analyzed.…”
“…This specific FPGA was the subject of radiation testing and characterization by many groups including, but not limited to the Xilinx Radiation Test Consortium and the GSFC Radiation Effects and Analysis Group [10][11][12][13][14][15][16].…”
This paper highlights the methodology and effectiveness of adapting the reconfigurable SpaceCube system to solve complex application requirements for a variety of space flight missions. SpaceCube is a reconfigurable, modular, compact, multi-processing platform for space flight applications demanding extreme processing power. The SpaceCube system is suitable for most mission applications, particularly those that are computationally and data intensive such as instrument science data processing. We will show how the SpaceCube hybrid processing architecture is used to meet data processing performance requirements that traditional flight processors cannot meet. This paper discusses the flexible computational architecture of the SpaceCube system and its inherent advantages over other avionics systems. The SpaceCube v1.0 processing system features two commercial Xilinx Virtex-4 FX60 Field Programmable Gate Arrays (FPGA), each with two embedded PowerPC405 processors. The FPGAs are mounted in an innovative back-to-back method, which reduces the size of the circuit board design while maintaining the added benefit of two FPGAs. All SpaceCube v1.0 cards are 4" x 4", yielding a small, yet powerful hybrid computing system. The architecture exploits the Xilinx FPGAs, PowerPCs, and necessary support peripherals to maximize system flexibility. Adding to the flexibility, the entire system is modular. Each card conforms to a custom mechanical standard that allows stacking multiple cards in the same box. This paper will detail the use of SpaceCube in multiple space flight applications including the Hubble Space Telescope Servicing Mission 4 (HST-SM4), an International Space Station (ISS) radiation test bed experiment, and the main avionics subsystem for two separate ISS attached payloads. Each mission has had varying degrees of data processing complexities, performance requirements, and external interfaces. We will show the methodology used to minimize the changes required to the physical hardware, FPGA designs, embedded software interfaces, and testing. This paper will summarize significant results as they apply to each mission application. In the HST-SM4 application we utilized the FPGA resources to accelerate portions of the image processing algorithms more than 25 times faster than a standard space processor in order to meet computational speed requirements. For the ISS radiation on-orbit demonstration, the main goal is to show that we can rely on the commercial FPGAs and processors in a space environment. We describe our FPGA and processor radiation mitigation strategies that have resulted in our eight PowerPCs being available and error free for more than 99.99% of the time over the period of four years. This positive data and proven reliability of the SpaceCube on ISS resulted in the Department of Defense (DoD) selecting SpaceCube, which is replacing an older and u.s. Government work not protected by U.S. copyright slower computer currently used on ISS, as the main avionics for two upcoming ISS experiment campaigns. This paper...
“…We present in another paper a more detailed scrubbing comparison illustrating that all scrub-able resources have practically no error while implementing external scrubbing. However, the other scrubbing techniques have a notable cross-section [4]. Fig.…”
We present guidel!nes to reduce nsk to an acceptable level when usmg complex devices n space appllcalions Appircation to Virtex 4 Field Programmabe Gate Array (FPGA) on Express Logtstlc Carner (ELC) project is prosenled.
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