Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

Wang, Ying; Zhang, Yue; Cao, Fei; Shan, Mingguang

doi:10.1109/tpel.2013.2280019

Cited by 13 publications

(5 citation statements)

References 36 publications

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“…These results are similar to results obtained for VDMOS devices [19]. Using TCAD simulation, Wang et al [23] have also been able to explore the potential for hardening using alternate structural configurations such as including a Schottky source plus an N-type buffer layer.…”

Section: Single Event Burnout (Seb) Effects In Umos Technologysupporting

confidence: 76%

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Galloway

2014

Electronics

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Silicon VDMOS power MOSFET technology is being supplanted by UMOS (or trench) power MOSFET technology. Designers of spaceborne power electronics systems incorporating this newer power MOSFET technology need to be aware of several unique threats that this technology may encounter in space. Space radiation threats to UMOS power devices include vulnerabilities to SEB, SEGR, and microdose. There have been relatively few studies presented or published on the effects of radiation on this device technology. The S-O-A knowledge of UMOS power device degradation and failure under heavy-ion exposure is reviewed.

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Section: Single Event Burnout (Seb) Effects In Umos Technologysupporting

confidence: 76%

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Galloway

2014

Electronics

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“…The avalanche current generated is relatively reduced. Second, due to the alternating existence of Ppillars and Npillars in the super-junction MOSFET, a lateral electric field is generated in its depletion region, so that the parasitic bipolar transistor requires a higher drain bias voltage when it is turned on [9].…”

Section: Introductionmentioning

confidence: 99%

Research on single-event burnout hardening of super-junction MOSFET

Wang¹,

Song²,

Hu³

2023

International Conference on Optoelectronic Materials and Devices (ICOMD 2022)

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When superjunction power devices work in spacecraft, they have to face extremely high radiation intensity, among which the single event effect is very serious, it will cause different types of damage to power devices, and then have catastrophic consequences for spacecraft, and With the increasing complexity and device integration of spacecraft systems, the harm of single event effects will become more serious. Therefore, it is very necessary to conduct research on anti-single event burnout of superjunction MOSFETs in aerospace applications. In order to solve the problem of single-event burnout of super-junction MOSFET under heavy-ion strike, the single event radiation effect and radiation hardening of traditional super-junction MOSFET devices are studied by using sentaurus TCAD simulation tool. The simulation results show that the device is most sensitive to the single-event effect when heavy-ion are vertically incident at the middle of the gate of the super-junction device, and the opening of the parasitic bipolar junction transistor is an important reason for the single-event burnout. A 200 V radiation-hardened super-junction power MOSFET device structure is designed. The experimental results show that the designed super-junction power MOSFET device with a buffer layer structure relieves the strong electric field on the backside during heavy-ion strike, has good resistance to single-event burnout, and improves the robustness of the device in aerospace applications.

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“…VDMOS are widely used in SMPS, dc-dc converters and voltage regulators [1]. It enabled switching power supplies for industrial and consumer applications [2].…”

Section: Introductionmentioning

confidence: 99%

Enhancement in the Design of VDMOS for Elimination of Parasitic BJT

Prasad,

Sahu,

Parmar

2023

Preprint

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This work provides solution to wipe out the effect of inherent parasitic bipolar junction transistor(BJT) present in the conventional power MOSFET. In this design, source and drain doping is eliminated from the design process using charge plasma technique leading to the removal of parasitic BJT from the device. A vertical metal oxide-semiconductor field effect transistor(VMOS) is proposed employing this technique. It is simulated and compared with the conventional vertical double diffused metal-oxide-semiconductor field effect transistor(VDMOS). In this work, proposed VMOS is also tested with various materials that can be used for plasma formation. When compared to the conventional VDMOS, the proposed VMOS exhibits 54.21% increment in breakdown voltage, 55.03% reduction in ON-resistance and approximately two times of the drain current density.

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Single-Event Burnout Hardened Structure of Power UMOSFETs With Schottky Source

Cited by 13 publications

References 36 publications

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

A Brief Review of Heavy-Ion Radiation Degradation and Failure of Silicon UMOS Power Transistors

Research on single-event burnout hardening of super-junction MOSFET

Enhancement in the Design of VDMOS for Elimination of Parasitic BJT

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