2010
DOI: 10.1109/led.2010.2051013
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Single and Multiple Oxygen Vacancies in Ultrathin $ \hbox{SiO}_{2}$ Gate Dielectric and Their Influence on the Leakage Current: An Ab Initio Investigation

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Cited by 28 publications
(20 citation statements)
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“…As in a real device, the Si crystal has been taken as the substrate of the gate stack and other layers are forced to match their crystal structure to the substrate. The Si/SiO 2 /Si stacks were constructed in our previous works and used in the calculation of leakage current through defective SiO 2 and SiON gate dielectrics . In this work we add a monoclinic HfO 2 layer on the top of SiO 2 in a supercell with a 2 × 2 lateral size (10.49 Å).…”
Section: First‐principles Approach and Structural Modelsmentioning
confidence: 99%
“…As in a real device, the Si crystal has been taken as the substrate of the gate stack and other layers are forced to match their crystal structure to the substrate. The Si/SiO 2 /Si stacks were constructed in our previous works and used in the calculation of leakage current through defective SiO 2 and SiON gate dielectrics . In this work we add a monoclinic HfO 2 layer on the top of SiO 2 in a supercell with a 2 × 2 lateral size (10.49 Å).…”
Section: First‐principles Approach and Structural Modelsmentioning
confidence: 99%
“…While not intended to, an overall agreement with experimental measurements of defect formation energies for oxygen vacancy and di-vacancy in bulk SiO 2 is found. [14,18,19] Analysis of the formation Figure 6), oxygen vacancies are likely to be neutral. However, increasing or decreasing the Fermi level will make negatively or positively charged oxygen vacancies more likely, respectively.…”
Section: Ii-defect Formation Energiesmentioning
confidence: 99%
“…Two different models for high-k SILC are discussed in the literature: the degradation of the interfacial SiO 2 layer (IL) 5,6 and defect related processes like, e.g., trap-assisted tunneling (TAT) or charge trapping within the high-k layer. [7][8][9] In bulk HfO 2 , oxygen related defects are the predominant intrinsic defects. 1,3,[10][11][12][13] For technical reasons, often, additional impurity atoms are incorporated in the gate stack systems.…”
mentioning
confidence: 99%
“…9,[20][21][22][23] Furthermore, the SILC through high-k dielectrics have been simulated at different levels of theory. [24][25][26] Also the influence of a possible fluorine passivation was under theoretical investigation.…”
mentioning
confidence: 99%