Sine output DDSs. A survey of the state of the art

Direct digital synthesis (DDS) architectures are becoming more prevalent as modern digitalto-analog converter (DAC) and programmable logic devices evolve to support higher bandwidths. The DDS architecture provides the benefit of digital control but at a cost of generating spurious content in the spectrum. The generated spurious content may cause intermodulation distortion preventing proper demodulation of the received signal. The distortion may also interfere with the neighboring frequency bands. This paper presents the various DDS architectures and explores the DDS architecture which provides the most digital reconfigurability with the lowest spurious content. End-to-end analytical equations, numerical and mathematical models are developed to determine the location and power levels of spurs. Afterwards, the analytical equations, numerical and mathematical models are shown to be consistent with the experimental data. A developer can use the information to design a DDS architecture that meets their minimum requirements.

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“…The phase is used as an address for the sine look-up table (LUT) [15]. The quantized form of a sinusoidal wave is stored in the LUT [16].…”

Section: Sine Output Ddsmentioning

confidence: 99%

End-to-End Direct Digital Synthesis Simulation and Mathematical Model to Minimize Quantization Effects of Digital Signal Generation

Patel

Martin

2020

IEEE Open J. Commun. Soc.

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“…The low 11-bit are used to query the ROM table. Then sampled amplitudes of sine wave are generated [7]. Fig.4.…”

Section: Sine Wave Generation Modulementioning

confidence: 99%

Research of Parameter Adjustable Harmonic Signal Generator Based on DDS

Zhang

2008

2008 ISECS International Colloquium on Computing, Communication, Control, and Management

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Harmonic signal generator whose frequency, phase and harmonic proportion are adjustable is designed for the detecting equipment of power system. The principle of DDS and the design requirement are introduced. Then the algorithm of ROM compression based on the symmetry of sine wave is expounded. Finally, using Altera FPGA, the detail design of the whole system is presented and test waveforms are given. Test results indicate that the system fulfils the design requirements.

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“…The arithmetic operations required to build a DDFS are a phase accumulator which generates the phase for generating the cosine waveform and a phase to amplitude converter. Various researches have been performed to design a high-performance circuit for phase-to-amplitude conversion as summarized in [26][27][28]. The quarter-wave symmetry ROM technique is very useful where a very low phase resolution has been used [29].…”

Section: Direct Digital Frequency Synthesizermentioning

confidence: 99%

A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

Hatai

Chakrabarti

2011

International Journal of Reconfigurable Computing

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This paper deals with an FPGA implementation of a high performance FM modulator and demodulator for software defined radio (SDR) system. The individual component of proposed FM modulator and demodulator has been optimized in such a way that the overall design consists of a high-speed, area optimized and low-power features. The modulator and demodulator contain an optimized direct digital frequency synthesizer (DDFS) based on quarter-wave symmetry technique for generating the carrier frequency with spurious free dynamic range (SFDR) of more than 64 dB. The FM modulator uses pipelined version of the DDFS to support the up conversion in the digital domain. The proposed FM modulator and demodulator has been implemented and tested using XC2VP30-7ff896 FPGA as a target device and can operate at a maximum frequency of 334.5 MHz and 131 MHz involving around 1.93 K and 6.4 K equivalent gates for FM modulator and FM demodulator respectively. After applying a 10 KHz triangular wave input and by setting the system clock frequency to 100 MHz using Xpower the power has been calculated. The FM modulator consumes 107.67 mW power while FM demodulator consumes 108.67 mW power for the same input running at same data rate.

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Sine output DDSs. A survey of the state of the art

Cited by 15 publications

References 31 publications

End-to-End Direct Digital Synthesis Simulation and Mathematical Model to Minimize Quantization Effects of Digital Signal Generation

End-to-End Direct Digital Synthesis Simulation and Mathematical Model to Minimize Quantization Effects of Digital Signal Generation

Research of Parameter Adjustable Harmonic Signal Generator Based on DDS

A New High-Performance Digital FM Modulator and Demodulator for Software-Defined Radio and Its FPGA Implementation

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