Simultaneous Switching Noise Analysis of a 16 Mb × 9 Dram Simm Memory Module

Abstract

HSPICE simulations have been performed for a 16 Mb×9 SIMM memory module and the simultaneous switching noise has been investigated. The SPICE model of the SIMM memory module is made up of a PCB circuit model and a simplified DRAM chip model. To keep the SPICE simulation time within reasonable bounds, a simplified circuit model of a 16 Mb DRAM chip was generated by keeping the basic physical DRAM structure in the model including the bit-line sense amplifiers. The parameter values of the circuit elements in the simplified DRAM chip model were tuned to fit the measured transient supply current waveform of a commercial 16 Mb DRAM chip. The SIMM module was placed on a fabricated motherboard PCB and the simultaneous switching noise voltage on the motherboard VSS plane was measured. Good agreement between measurements and HSPICE simulations were observed.