Simulation of μ-Bump and TSV in 3-D Integration

Abstract

The reduction of package and chip size by the need of cost reduction on one hand and the need of high voltage metallization on chip for power applications on the other hand the thermal electrical-mechanical management concerning the reliability becomes more and more critical. Breakdown failures due to mechanical stress, moisture uptake, migration effects caused by current crowding, temperature gradients due to Joule heating and stress gradients and intermetallic phase growth have an increasing importance. With the help of simulations the weakest links as well as locations with high thermal electrical and mechanical loads can be determined. This will be shown for selected examples.