Simulation of noise curves of the new integrated DDS from analog devices

The regression model of power spectral density of phase noise of direct digital synthesizers

“…5. This values are different from the known [5,6] (k 1 = -8.3, k 2 = -8.93, k 3 = -16.2, k 4 = -13.5). The obtained noise characteristics for DDS AD9956, shown in Fig.…”

“…These models have the necessary accuracy only for a certain class of synthesizers. A more accurate model of the power spectral density of DDS phase noise was obtained in [5] and studied in [6][7][8][9][10][11].…”

The mathematical model of noise characteristics of a direct digital synthesizer with the built-in multiplier of clock frequency on PLL

“…It is rather difficult to determine the estimated noise level for other coefficients of multiplication and at any values of clock frequency experimentally, as high-precision expensive spectrum analyzers are required It is desirable to have possibility of a theoretical assessment of the phase noise level, using the data of the developers. In [1][2][3][4][5][6] the mathematical models of PSD of phase noise of functional links of systems of PLL, and in [7][8][9][10] similar models of direct digital synthesizer are worked out for these purposes, that gives the chance to estimate noise characteristics almost for the whole wide range of output and clock frequencies.…”