Simulation Methodology for Assessing X-Ray Effects on Digital Circuits

Abstract

Recently, X-Rays have proven to be an interesting and feasible mean to perform fault injection attacks against secure implementations. Their wavelength allows targeting single elements even with most recent fabrication technologies, and their high penetration power does not demand to invasively prepare the device for the attack. Unlike operations in harsh environment, a malicious attacker can choose the targeted region at will, from a single cell up to large regions. This aspect forces designers to consider hardening against X-Rays under a different perspective. In this work, we will present a design-time simulation flow, that addresses how the electrical characteristics of the logic are changed when irradiated, from the perspective of injected faults and of biased power consumption.