Simulation design of an efficient MTI processing module for embedded platform

Yousuf, Munaza; Mahmud, Riaz; Aziz, Arshad

doi:10.1109/meco.2013.6601322

Cited by 4 publications

(2 citation statements)

References 1 publication

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“…Filter notch width and filter depth can be designed according to the actual situation. MTI filter is divided into the single delay line filter and the double delay line filter, according to the number of delay lines [8]. Figure 2 shows the normalized gain of different cancellers.…”

Section: Mti Clutter Suppression Methodsmentioning

confidence: 99%

Research on Radar Clutter Suppression Method Based on Stagger MTI

Liu,

Li,

Guo

et al. 2023

J. Phys.: Conf. Ser.

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A large number of clutter interference signals were involved in radar echoes. Radar detection and tracking performance degrade when the signal-to-noise ratio of the echo signal is too low. Therefore, how to suppress clutter interference is a problem that is worth studying in designing. In this paper, the statistical characteristics of radar clutter were analyzed, and a clutter suppression method based on staggered MTI was proposed for the blind speed problem of traditional MTI filters. Simulation experiments verified the model and processing method of staggered filtering. The results indicated that the method improved the blind speed while effectively suppressing the clutter.

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Section: Mti Clutter Suppression Methodsmentioning

confidence: 99%

Research on Radar Clutter Suppression Method Based on Stagger MTI

Liu,

Li,

Guo

et al. 2023

J. Phys.: Conf. Ser.

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show abstract

“…A MATLABbased mathematical model of the system has been developed and investigated. Part of the data, received as a result from these investigations, has been used for the simulation of the circuit [15] and synthesized in FPGA to verify if the system meets the real-time constraints. The analysis of the results shows their complete coincidence with those received from the mathematical simulation.…”

Section: Design Implementationmentioning

confidence: 99%

Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform

Yousuf

Aziz

Mahmud

2014

Chinese Journal of Engineering

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This paper presents an area efficient Field Programmable Gate Array (FPGA) based digital design of a processing module for MTI radar. Signal contaminated with noise and clutter is modelled to test the efficacy of the design algorithms. For flexibility of design and to achieve optimized results, we have combined the high-level utility of MATLAB with the flexibility and optimization on FPGA for this implementation. Two- and three-pulse cancellers are chosen for design due to its simplicity in both concept and implementation. The results obtained are efficient in terms of enhanced throughput per Slice (TPA) of 1.146, that is, occupying fewer area resources on hardware while achieving optimized speed. The outcomes show that this design of MTI radar processor has many advantages, such as high processing precision, strong processing ability, real time, and low cost. All these advantages greatly contribute to the design requirements and make it appropriate for the application of high-speed signal processing.

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Range and Doppler estimation of multiple moving targets for pulsed Doppler radars with CFAR detector at very low SNRs

Butt

Gul

2014

2014 International Conference on Emerging Technologies (ICET)

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Simulation design of an efficient MTI processing module for embedded platform

Cited by 4 publications

References 1 publication

Research on Radar Clutter Suppression Method Based on Stagger MTI

Research on Radar Clutter Suppression Method Based on Stagger MTI

Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform

Range and Doppler estimation of multiple moving targets for pulsed Doppler radars with CFAR detector at very low SNRs

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