Simulation and measurement of supply and substrate noise in mixed-signal ICs

Modelling of Substrate Noise and Mitigation Schemes for UWB Systems

“…better noise isolation properties, lightly doped substrates are widely used in mixed-signal designs (7,12,15). Since the resistivity of lightly doped substrates is much higher than that of heavily doped substrates, the substrate can no longer be treated as a single electrical node.…”

“…While this approach may lead to accurate results it involves lengthy and time-consuming simulations. Therefore, in an attempt to reduce simulation complexity the use of macro models has been proposed (6,7,12,15,16). Here the switching current from digital blocks is typically represented using an asymmetrical triangular waveform which, when combined with a lumped element equivalent network representing the substrate, allows for fast generation of SPICE simulations results.…”

“…7.3.1, the switching noise generated by digital circuits can propagate through the substrate to reach sensitive analog/RF circuits and deteriorate their performance. A number of methods have been proposed for achieving an efficient model that is able to capture the main features of the switching noise (4)(5)(6)(7)(12)(13)(14)(15)(16)(17)(18). For heavily doped substrates the substrate is simplified as one electrical node due to their low resistivity, and switching noise modeling methods using this simplification have been proposed (13,14).…”

Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs

“…It may degrade the reliability and performance of these sensitive analog/mixed-signal/RF IPs [2]. The problem is becoming a growing concern due to higher clock frequency, more accurate analog precision, deeper technology scaling, and the integration of front-end RF with digital blocks [3]- [5]. Many effects that corrupt RF signal such as DC offset, oscillator pulling and pushing, local oscillator leakage can be traced to the substrate-coupled noise [2].…”

“…Although This work is supported in part by SRC under contract 2005-TJ-1321, IBM Faculty Award, and equipment donations from Intel. many works have been done in modeling and simulation of substrate noise [2], [3], [5], [12]- [15], there is not much in the literature on substrate noise optimization in early floorplanning stage. Lin et al [7] proposed an optimization technique that incorporates substrate noise minimization into optimization loops.…”