Simulation and development environment for mobile 3D graphics architectures

A Latency-Effective Pipelined Divider for Double-Precision Floating-Point Numbers

“…It determines a coarse quotient   by executing (2) with a very small LUT; then the subdividend   is calculated by multiplying the divisor by this coarse quotient and subtracting the value from the dividend:  =  −   . With this subdividend,    is obtained again using (2). The final quotient is obtained by adding the two calculated quotients.…”

“…Thus, the design of high-performance dividers has become an important issue in high-speed computing. Efficient pipelined dividers are required for 3D computer graphics, signal processing, and scientific computing applications where the performance depends heavily on division operations [2][3] [4][5] [6]. This efficient pipeline divider technology is widely used to reduce power consumption and latency in multi-media and signal processing applications as well as fast processing [7].…”

Effective Fixed-Point Pipelined Divider for Mobile Rendering Processors

“…In a desktop PC, a floating-point format is used for the high performance rendering processor. In [5]- [7], a fixed-point format has been used for the low-cost rendering processor of a mobile device. A fixed-point pipelined divider consists of a left shifter for normalization of the dividend and the divisor, a division unit for division execution, and a right shifter for converting the result to a fixed-point format.…”