SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

Zhang, Jie; Abulila, Ahmed; Kwon, Miryeong; Shahidi, Narges; Shalf, John; Kim, Nam Sung; Kandemir, Mahmut

doi:10.1109/lca.2017.2750658

Cited by 40 publications

(12 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…After then, we find and scan an active block in the plane and store the addresses of the free pages in the array (free_pages_info) (Algorithm 2, 17). For each valid page, we fetch its address, map its corresponding destination page addresses, and store the pairs of valid and free page addresses into the array address_pairs (Algorithm 2, lines [18][19][20][21][22][23][24].…”

Section: E Implementationmentioning

confidence: 99%

“…For example, if we set the GC threshold to 10%, the GC will start running when the number of free blocks available is less than 10%. In our study, we set the value of the GC threshold as 5% and 10% by referencing the previous studies [1], [20], [23], [37], [44]. We set the greatest threshold to 14% because the overprovisioning value in our simulator is set to 15% and the threshold cannot bigger than the overprovisioning value.…”

Section: A Experimental Setupmentioning

confidence: 99%

See 1 more Smart Citation

A Preliminary Study: Towards Parallel Garbage Collection for NAND Flash-Based SSDs

2020

View full text Add to dashboard Cite

Section: E Implementationmentioning

confidence: 99%

Section: A Experimental Setupmentioning

confidence: 99%

A Preliminary Study: Towards Parallel Garbage Collection for NAND Flash-Based SSDs

2020

View full text Add to dashboard Cite

“…Yoo [11]. In [12], Jung et al proposed an SSD simulator called SimpleSSD that simplifies the nondescript features of storage internals while modeling all the detailed hardware and software characteristics. It can be easily integrated into full system simulators such as gem5 and accommodate a complete storage stack.…”

Section: Related Work a Emulation Of Ssdsmentioning

confidence: 99%

HMB-SSD: Framework for Efficient Exploiting of the Host Memory Buffer in the NVMe SSD

2019

View full text Add to dashboard Cite

Host Memory Buffer (HMB) is a highlighted feature of the Non-Volatile Memory Express (NVMe) protocol, which is the state-of-the-art storage interface for emerging storage devices such as Solid-State Drives (SSDs). HMB enables the underlying storage to make use of a portion of host memory for caching their address mapping information and/or user data, so that they can overcome the limited capacity of memory within the storage. This technology opens an opportunity to optimize the I/O performance costeffectively by sharing the ample host memory with the severely resource-constrained device. However, it is challenging to study the HMB-based optimization techniques in the practical system because there is no SSD development platform supporting the HMB feature as well as the commercial SSD products veil their internals, not allowing a custom extension. Motivated by this limitation, this paper presents an HMB-supported SSD development platform called HMB-SSD, which is built by faithfully extending an open-source SSD emulator. HMB-SSD enables to easily integrate and evaluate I/O techniques for the HMB feature in an SSD emulator, which closely mimics the behavior of real devices. We demonstrate the proper operation of our platform and the efficacy of the HMB feature with a case study on write buffering. In our empirical study, the SSD storage achieves a large performance benefit with the HMB-based write buffer, yielding up to 86.2% better performance than that of without it.

show abstract

“…For example, [13], which is widely used for SSD simulations in both academia and industry, only captures the functionality of a specific flash firmware, called flash translation layer (FTL) without modeling any hardware resource in an SSD. Similarly, most recent simulators [14]- [16] have no model for computation complex and therefore, no detailed timing simulation for firmware execution can be carried out. Further, to the best of our knowledge, there exists no simulation model that can be integrated into a full-system environment by implementing all actual storage interfaces and data transfer emulations.…”

Section: Introductionmentioning

confidence: 99%

“…Lastly, none of the existing SSD simulators can be attached to different storage interfaces by respecting both functional and timing CPU modeled full-system infrastructures. For example, [14] and [15] enable a full-system simulation, but they only work on a functional CPU, which overly simplifies the host memory subsystem and CPU execution timings.…”

Section: Introductionmentioning

confidence: 99%

Amber: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources

Gouk

Kwon

Zhang

et al. 2018

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

Self Cite

View full text Add to dashboard Cite

SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system.In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of fullsystems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.

show abstract

SimpleSSD: Modeling Solid State Drives for Holistic System Simulation

Cited by 40 publications

References 14 publications

A Preliminary Study: Towards Parallel Garbage Collection for NAND Flash-Based SSDs

A Preliminary Study: Towards Parallel Garbage Collection for NAND Flash-Based SSDs

HMB-SSD: Framework for Efficient Exploiting of the Host Memory Buffer in the NVMe SSD

Amber: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources

Contact Info

Product

Resources

About