Proceedings of the 2020 on Great Lakes Symposium on VLSI 2020
DOI: 10.1145/3386263.3406907
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SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy

Abstract: The ever-increasing quest for data-level parallelism and variable precision in ubiquitous multimedia and Deep Neural Network (DNN) applications has motivated the use of Single Instruction, Multiple Data (SIMD) architectures. To alleviate energy as their main resource constraint, approximate computing has re-emerged, albeit mainly specialized for their Application-Specific Integrated Circuit (ASIC) implementations. This paper, presents for the first time, an SIMD architecture based on novel multiplier and divid… Show more

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Cited by 10 publications
(19 citation statements)
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“…This highlights the demand for a generic approximate SIMD ALU, that can also be utilized in health-monitoring platforms. Moreover, while Add/Mul are frequent functions in bio-signal processing workloads, [9], [15], [18] and our evaluations show that long latency/high power of division, not only limit application speed, but also consumes considerable portion of ALU area/energy (Fig. 1b).…”
Section: Introductionmentioning
confidence: 88%
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“…This highlights the demand for a generic approximate SIMD ALU, that can also be utilized in health-monitoring platforms. Moreover, while Add/Mul are frequent functions in bio-signal processing workloads, [9], [15], [18] and our evaluations show that long latency/high power of division, not only limit application speed, but also consumes considerable portion of ALU area/energy (Fig. 1b).…”
Section: Introductionmentioning
confidence: 88%
“…However, such CGRAs suffer from high area, stems from multiple datapath in PEs. Amortizing this penalty, few works have narrowed their focus to design approximate SIMD Mul and/or Div [15], [19].…”
Section: Related Workmentioning
confidence: 99%
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