4th IEEE Conference on Nanotechnology, 2004.
DOI: 10.1109/nano.2004.1392328
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Silicon nanocrystals: from coulomb blockade to memory arrays

Abstract: Absfracf -Silicon nanocrystals provide opportunity to solve the challenging problem of tunnel oxide scaling of conventional Flash memories by increasing immunity to charge loss via tunnel oxide defects. New aspects in silicon nanocrystal memory technology include Coulomb blockade or charge confinement effects, atomistic nucleation, and nanocrystal passivation to preserve them during subsequent processing and progranderase endurance characteristics. This paper discusses the above characteristics and culminates … Show more

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Cited by 6 publications
(4 citation statements)
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“…[18][19][20][21][22] In order to surmount the physical limitations and mitigate reliability issues due to incessant technology scaling, discrete nanocrystal NVM was proposed as a major alternative to conventional FG-based charge storage NVM. [78][79][80][81][82][83][84][85][86][87][88][89][90][91][92][93][94][95][96] Discrete nanocrystal NVM replaces conductive polysilicon FG charge storage layer with mutually isolated charge Table II. Overview of proposed technical approaches to mitigate critical reliability issues of charge storage NVM due to technology scaling.…”
Section: Decrement In Tolerable Loss Of Electrons In Storage Layermentioning
confidence: 99%
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“…[18][19][20][21][22] In order to surmount the physical limitations and mitigate reliability issues due to incessant technology scaling, discrete nanocrystal NVM was proposed as a major alternative to conventional FG-based charge storage NVM. [78][79][80][81][82][83][84][85][86][87][88][89][90][91][92][93][94][95][96] Discrete nanocrystal NVM replaces conductive polysilicon FG charge storage layer with mutually isolated charge Table II. Overview of proposed technical approaches to mitigate critical reliability issues of charge storage NVM due to technology scaling.…”
Section: Decrement In Tolerable Loss Of Electrons In Storage Layermentioning
confidence: 99%
“…[78][79][80][81][82][83][84][85][86][87][88][89][90][91][92][93][94][95][96] Electrons are stored into these "dots" distributed in the control oxide layer that is able to exert electrostatic control over the current flow in the channel. Due to its discrete charge trap nature (which is inherently immune to defect assisted charge leakage through TAT), tunnel oxide of nanocrystal NVM is able to scale down below 7-8 nm.…”
Section: Proposed Technical Mitigation Approaches Descriptionmentioning
confidence: 99%
“…Since Tiwari et al [4] first proposed the idea of integrating Si ncs into the memory devices, Si nc based memory devices have attracted much attention [5,163,175,176]. It is a memory device that utilizes direct tunneling into three-dimensionally confined nanocrystal to produce the bistability in the conduction of a transistor channel [156,176].…”
Section: Electrical Applications (A) Memory Devicesmentioning
confidence: 99%
“…O caso de carregamento através de tunelamento direto produz um ΔV T muito pequeno o que compromete o funcionamento de todo o dispositivo, a não ser em casos em que a densidade de nanoestruturas é muito alta, porém para esses casos os processos de obtenção das nanoestruturas não é compatível com a tecnologia CMOS [71]. No entanto, bons resultados têm sido obtidos quando as ns-Si são carregadas por portadores quentes [72].…”
Section: Aplicação Elétricaunclassified