Signal processing techniques for reliability improvement of sub-20NM NAND flash memory

Abstract

The capacity of NAND flash memory has been continuously increased by adopting process technology scaling and multi-level cell (MLC) data coding. However, the reliability of stored data becomes a very important issue because the scaled feature size lowers the number of electrons at each floating-gate while increasing the cell-to-cell interference. In this paper, we review recent advances in signal processing techniques for reliability improvement of sub-20 nm NAND flash memory, which includes estimation of the threshold voltage distribution, cell-to-cell interference cancellation, and optimal multi-level memory sensing. We also present experimental results for the explained signal processing algorithms. Especially, we demonstrate the reliability improvement when combining all these techniques.

Efficient low‐complexity two‐dimensional equalisation technique for multi‐level cell flash memory storage systems

“…Therefore, in addition to exploiting the physical structure of the flash memories, more intelligent detection approaches have to be considered. The authors of [5][6][7] have evaluated different methods to basically estimate the amount of threshold voltage shift caused by the ICI, and hence retrieve the original written data from the sensed voltage. However, their approaches lack the realistic channel model, in which threshold voltage distribution under distinct voltage windows differs.…”