2007
DOI: 10.1088/0957-4484/18/40/405703
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Sidewall roughness measurement inside photonic crystal holes by atomic force microscopy

Abstract: We present a measurement technique to quantify sidewall roughness inside planar photonic crystal (PhC) holes. Atomic force microscopy is used to scan hole cross-section profiles. By fitting a circle onto each scan line and subtracting this circle from the measurement data, a quantitative value for the deviation from the ideal cylindrical hole shape is extracted. We investigate the sidewall roughness of InP-based PhC holes depending on the nitrogen content of the semiconductor etching plasma. The existence of a… Show more

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Cited by 12 publications
(8 citation statements)
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References 14 publications
(18 reference statements)
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“…In the case of LER, scatterometry techniques and CD-AFM measurements have also been applied but further improvement and benchmarking are still needed. Regarding CER, one can find in literature few papers which use conventional AFM for the characterization of the sidewall roughness of photonic crystal holes [5], while no work has been done on scatterometry. In this work, we follow the main trend and use top-down SEM images as input in CER evaluation methodology [1][2][3][6][7][8][9].…”
Section: Cer Evaluation Methodologymentioning
confidence: 99%
“…In the case of LER, scatterometry techniques and CD-AFM measurements have also been applied but further improvement and benchmarking are still needed. Regarding CER, one can find in literature few papers which use conventional AFM for the characterization of the sidewall roughness of photonic crystal holes [5], while no work has been done on scatterometry. In this work, we follow the main trend and use top-down SEM images as input in CER evaluation methodology [1][2][3][6][7][8][9].…”
Section: Cer Evaluation Methodologymentioning
confidence: 99%
“…[2][3][4][5][6][7] Furthermore, the sidewall roughness of single contacts [usually called contact edge roughness (CER)] has various effects on transistor performance such as the time-dependent dielectric breakdown coming from the reduction of the space between the contacts and gate in a transistor and the saturation value of source/drain current. 11 The increased importance of contact roughness and variability issues demands first for a reliable and advanced measurement and characterization approach [8][9][10][11][12][13] and second, for systematic experimental and modeling studies investigating the CD variation and CER dependencies on various EUV resist properties and process conditions. 11 The increased importance of contact roughness and variability issues demands first for a reliable and advanced measurement and characterization approach [8][9][10][11][12][13] and second, for systematic experimental and modeling studies investigating the CD variation and CER dependencies on various EUV resist properties and process conditions.…”
Section: Introductionmentioning
confidence: 99%
“…The involvement of edge length effects in CER process and material dependencies is not clear and more investigations are needed. Nevertheless, the literature devoted to the process effects on CER is very limited and to our knowledge very few works have been reported on exposure-dose effects [5,9]. In previous work, we studied the effects of exposure dose on CER parameters and recalled the edge length effects to explain the difference with LER behavior characterized by the well-known RLS trade off [15,19].…”
Section: Introductionmentioning
confidence: 99%