SHRINK: Reducing the ISA complexity via instruction recycling

Abstract

Microprocessor manufacturers typically keep old instruction sets in modern processors to ensure backward compatibility with legacy software. The introduction of newer extensions to the ISA increases the design complexity of microprocessor front-ends, exacerbates the consumption of precious on-chip resources (e.g., silicon area and energy), and demands more efforts for hardware verification and debugging. We analyzed several x86 applications and operating systems deployed between 1995 and 2012 and observed that many instructions stop being used over time, and more than 500 instructions were never used in these applications. We also investigate the impact of including these unused instructions in the design of the x86 decoders and propose SHRINK, a mechanism to remove old instructions without breaking backward compatibility with legacy code. SHRINK allows us to remove 40% of the instructions from the x86 ISA and improve the critical path, area, and power consumption of the instruction decoder, respectively, by 23%, 48%, and 49%, on average.

Framework for Machine Instruction Usage Analysis

“…The authors assume that this information is useful for developing intermediate languages such as Java bytecode to minimize memory consumption. Another research [16] performs static analysis of virtual machine disk images. An instruction crawler was implemented that looks through each disk image and counts how many times each unique instruction signature (UIS) appears in any executable file.…”

Improving multitask performance and energy consumption with partial-ISA multicores

“…By the combination of [24] and [27], Blem concludes that what affects power and performance in modern systems is the presence or absence of specialized ISA extensions (such as vectorization, FP, crypto instructions) that may appear in some ISAs, but not in others. In [28], Lopes et al perform an extensive analysis of ISA aging and the cost of the decoder for keeping old operations in the architecture set. The authors propose a technique to remove and recycle instructions that are not used by compilers anymore.…”

Handling IoT platform heterogeneity with COISA, a compact OpenISA virtual platform

“…Our previous experience with ISA emulation and design have shown us that a clean ISA, similar to MIPS, allows us to build a high‐performance emulator capable of emulating guest applications on ARM and x86 host processors at near native performance. As a result, we are designing OpenISA, an ISA that aims to be emulation‐friendly, empowering most of the devices to execute the same set of applications.…”