Short-circuit robustness test and in depth microstructural analysis study of SiC MOSFET

Safa, Mbarek; Dherbécourt, Pascal; Latry, Olivier; Fouquet, Francois

doi:10.1016/j.microrel.2017.07.002

Cited by 19 publications

(11 citation statements)

References 11 publications

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“…Finally, the results in Fig. 13c [4] detected by using a Photon Emission Microscope (PEM), confirms a structural defect on the poly-silicon gate after the short circuit aging. Overall, it seems that the SiC MOSFET is prone to gate-oxide breakdown failures either related to cracks in the dielectric around the poly-silicon gate, the poly-silicon gate itself or defects in the gate structure.…”

Section: Analysis Of Degraded Sic Mosfets In Previous Literaturementioning

confidence: 53%

Effect of short-circuit stress on the degradation of the SiO2 dielectric in SiC power MOSFETs

Reigosa

Iannuzzo

Ceccarelli

2018

Microelectronics Reliability

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This paper presents the impact of a short-circuit event on the gate reliability in planar SiC MOSFETs, which becomes more critical with increased junction temperature and higher bias voltages. The electrical waveforms indicate that a gate degradation mechanism takes place, showing a large gate leakage current that increases as the gate degrades more and more. A failure analysis has been performed on the degraded SiC MOSFET and then compared to the structure of a new device to identify possible defects/abnormalities. A Focused Ion Beam cut is performed showing a number of differences in comparison to the new device: (i) cracks between the poly-silicon gate and aluminium source, (ii) metal particles near the source contact, and (iii) alterations in the top surface of the aluminium source. The defects have been correlated with the increase in gate-leakage current and drain-leakage current.

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Section: Analysis Of Degraded Sic Mosfets In Previous Literaturementioning

confidence: 53%

Effect of short-circuit stress on the degradation of the SiO2 dielectric in SiC power MOSFETs

Reigosa

Iannuzzo

Ceccarelli

2018

Microelectronics Reliability

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“…Alternatively, the Photoemission Electron Microscopy (PEM) technique [25], [26], [54], [116] can also be used to locate fault points in an electronic device efficiently. Its underlying principle relies on a cooled charge-coupled-device (C-CCD) camera for capturing photons emitted by the combination of electrons and holes at a defect point.…”

Section: A Failure Analysis Of Devices With Gate Failurementioning

confidence: 99%

Review of Methodologies for Evaluating Short-Circuit Robustness and Reliability of SiC Power MOSFETs

Cui

Xin

Liu

et al. 2022

IEEE J. Emerg. Sel. Topics Power Electron.

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To accelerate the broad application of silicon carbide (SiC) power MOSFETs, their short-circuit (SC) robustness and reliability must be thoroughly evaluated. This paper, therefore, presents an overview of related research methods aiming to meet that objective. Topics reviewed include the non-destructive tester (NDT) used to implement SC faults, extraction and analysis of degradation parameters, and failure analysis of SiC MOSFETs. Concerning the NDT, its design criteria and methods for evaluating SC robustness are discussed. After which, key parameters used to assess SC reliability and methods for investigating degradation mechanisms are discussed and summarized. Finally, failure analysis techniques and their contributions to failure mechanisms are reviewed.

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“…Another paper shows that the temperature at failure in the crystal is between 1600 and 2000 K, depending of the failure mode (fail to open or fail to short respectively) [18]. Furthermore, even if the gate oxide has been identified to be the weakest part of SiC MOSFETs, micro-structural failure analyses made on commercial devices did not show cracks in the gate oxide but mainly in the field oxide, which nevertheless results in a path between the polysilicon gate and the source terminal [19,20].…”

Section: Introductionmentioning

confidence: 99%

New definition of critical energy for SiC MOSFET robustness under short circuit operations: The repetitive critical energy

Chen

Nguyen

Labrousse

et al. 2020

Microelectronics Reliability

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Previous research showed that Si devices could sustain a large number of Short Circuit (SC) events, as long as the energy dissipated during SC remains slightly below a given threshold (the so-called critical energy). In this paper, we show that this is not necessarily true for SiC MOSFETs, which can only withstand a few such SC events. This low robustness to repetitive short-circuit events is related to the gate degradation due to the cumulative carrier injection and leakage currents in the oxide. To ensure safe operation over a large number of SC events, we introduce a new parameter: the "repetitive critical energy", which corresponds to a SC energy low enough to avoid excessive temperature increase so as to limit the transient gate leakage current during SC events. Below this repetitive SC energy value, the SiC device is able to sustain a large number (more than 1000) of SC events.

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Short-circuit robustness test and in depth microstructural analysis study of SiC MOSFET

Cited by 19 publications

References 11 publications

Effect of short-circuit stress on the degradation of the SiO2 dielectric in SiC power MOSFETs

Effect of short-circuit stress on the degradation of the SiO2 dielectric in SiC power MOSFETs

Review of Methodologies for Evaluating Short-Circuit Robustness and Reliability of SiC Power MOSFETs

New definition of critical energy for SiC MOSFET robustness under short circuit operations: The repetitive critical energy

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