Shannon Logic Based Novel QCA Full Adder Design with Energy Dissipation Analysis

Kandasamy, Nehru; Ahmad, Firdous; Telagam, Nagarjuna

doi:10.1007/s10773-018-3883-3

Cited by 15 publications

(11 citation statements)

References 19 publications

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“…e comparison of the proposed QCA submodules with previously reported designs in terms of circuit complexity are shown in Tables 1-4, respectively. e proposed subcircuits of QCA DCT approximation have lower computational complexity and better performances compared to the existing ones. As shown in Table 1, the designed full adder has an improvement of 78%, 85%, and 75% in terms of cell complexity, extent, and delay, correspondingly, compared with the design in [53]. Compared with the design in [49], the proposed full adder has an advancement of 8.16% and 50% in terms of cell complexity and delay, respectively.…”

Section: Resultsmentioning

confidence: 94%

An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology

Gassoumi

Touil

Ouni

et al. 2019

Journal of Electrical and Computer Engineering

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Optimization for power is one of the most important design objectives in modern digital image processing applications. The DCT is considered to be one of the most essential techniques in image and video compression systems, and consequently a number of extensive works had been carried out by researchers on the power optimization. On the other hand, quantum-dot cellular automata (QCA) can present a novel opportunity for the design of highly parallel architectures and algorithms for improving the performance of image and video processing systems. Furthermore, it has considerable advantages in comparison with CMOS technology, such as extremely low power dissipation, high operating frequency, and a small size. Therefore, in this study, the authors propose a multiplier-less DCT architecture in QCA technology. The proposed design provides high circuit performance, very low power consumption, and very low dimension outperform to the existing conventional structures. The QCADesigner tool has been utilized for QCA circuit design and functional verification of all designs in this work. QCAPro, a very widespread power estimator tool, is applied to estimate the power dissipation of the proposed circuit. The suggested design has 53% improvement in terms of power over the conventional solution. The outcome of this work can clearly open up a new window of opportunity for low power image processing systems.

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Section: Resultsmentioning

confidence: 94%

An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology

Gassoumi

Touil

Ouni

et al. 2019

Journal of Electrical and Computer Engineering

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“…RMG gate can be used vigorously in place of the OMG gate for designing QCA circuits for minimizing area, delay and power with improving the overall circuit functionality. Many circuits have been designed in literature, which shows the importance of RMG gate in designing QCA circuits (Hamid and Abdalhossein, 2017; Prakash et al , 2019; Sasamal et al , 2017; Seyedi and Navimipour, 2018; Kandasamy et al , 2018; Fam and Navimipour, 2019).…”

Section: Physical Proof For Majority Gatementioning

confidence: 99%

“…The proposed circuit provides a significant improvement in many parameters when compared with similar works for the 2-to-4 decoder designs. A new type of Shannon Logic Based novel QCA FA design with energy dissipation analysis is done in Kandasamy et al (2018), which shows the fundamental ability of the RMG gate for designing various circuits in QCA technology. In Fam and Navimipour (2019), loop-based Random Access Memory (RAM) has been designed utilizing the RMG gate.…”

Section: Physical Proof For Majority Gatementioning

confidence: 99%

Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Kassa

Gupta

Kumar

et al. 2021

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Purpose In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits. Design/methodology/approach This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration. Findings A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level. Originality/value This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

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“…The Quantum‐dot Cellular Automata (QCA) technology is a promising way to provide high‐speed and low‐area circuits and devices at nano‐scale 2–5 . As a result, this emerging technology is suitable candidate to replace conventional CMOS technology 3,5–8 . This emerging technology utilizes appropriate charge formation for information coding instead of current in major electronic circuits 1,6–8 .…”

Section: Introductionmentioning

confidence: 99%

Novel multilayer SISO shift register architecture in QCA technology and its usage in communications

Divshali

Rezai

Karimi

2022

Int J Communication

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Summary The QCA technology is a promising emerging technology at nano‐scale for replacing CMOS technology. Shift register has a vital role in communication networks and digital electronic circuits that are the main components of integrated circuits and memory. In this study, novel and efficient delay circuit (pseudo‐D‐Latch) is designed. Then, 3‐, 4‐, and 5‐bit SISO QCA shift register architectures are developed and evaluated in single layer, 3‐layer and 5‐layer using the designed delay circuit. The designed architectures are evaluated using QCADesigner‐E tool version 2.2. The results demonstrate that the pseudo‐D‐Latch circuit contains 17 cells and 0.01 μm2 area. The 3‐, 4‐, and 5‐bit single layer SISO QCA shift register architecture contains 63 (0.05 μm2), 85 (0.66 μm2), and 107 (0.08 μm2) cells (area), respectively. The 3‐ and 4‐bit 3‐layer SISO QCA shift register architecture contains 63 (0.03 μm2) and 84 (0.03 μm2) cells (area), respectively. The 3‐ and 5‐bit 5‐layer SISO QCA shift register architecture contains 62 (0.02 μm2) and 105 (0.032 μm2) cells (area), respectively. These results show that the designed QCA architectures provide improvements compared with other SISO QCA architectures.

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Shannon Logic Based Novel QCA Full Adder Design with Energy Dissipation Analysis

Cited by 15 publications

References 19 publications

An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology

An Efficient Design of DCT Approximation Based on Quantum Dot Cellular Automata (QCA) Technology

Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Novel multilayer SISO shift register architecture in QCA technology and its usage in communications

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