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Silicon wafers, n<100>, ρ = 3 Ωcm
Silicon oxidation, x ox = 1,6 μm [Figure 2(a)]
Resist Spin coating t resist = 4 μm
Photoresist patterning (UV, E = 100 mJ/cm 2 , t dev = 30 s), Mask 1 [Figure 2(a)]
Ti/Pt 15 nm/200 nm deposition [Figure 2(b)]
Photoresist removal [Figure 2(c)]
Si 3 N 4 deposition and patterning for opening contact windows between cells and electrodes and the opening the interchip for allowing the silicon anisotropic etching from the front size. Mask 2 [Figure 2(c)]
Silicon wafers, n<100>, ρ = 3 Ωcm
Silicon oxidation, x ox = 1,6 μm [Figure 2(a)]
Resist Spin coating t resist = 4 μm
Photoresist patterning (UV, E = 100 mJ/cm 2 , t dev = 30 s), Mask 1 [Figure 2(a)]
Ti/Pt 15 nm/200 nm deposition [Figure 2(b)]
Photoresist removal [Figure 2(c)]
Si 3 N 4 deposition and patterning for opening contact windows between cells and electrodes and the opening the interchip for allowing the silicon anisotropic etching from the front size. Mask 2 [Figure 2(c)]