2010
DOI: 10.1109/tns.2010.2044808
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Sensitive Volume and Triggering Criteria of SEB in Classic Planar VDMOS

Abstract: This paper presents 2-D numerical simulation results which allow the definition of the sensitive volume and triggering criteria of SEBs for VDMOS in classic planar-type technology. The results analysis allows for a better understanding of the SEB mechanism.

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Cited by 53 publications
(20 citation statements)
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“…Thus, the generated currents lead to thermal runaway and burnout. Furthermore, the peak electric field is directly proportional to the impact ionisation coefficient, which is related to the SEB sensitivity [23,24]. Hence, the reduction of the peak electric field will improve the SEB performance [25].…”
Section: Seb Simulation Results and Discussionmentioning
confidence: 99%
“…Thus, the generated currents lead to thermal runaway and burnout. Furthermore, the peak electric field is directly proportional to the impact ionisation coefficient, which is related to the SEB sensitivity [23,24]. Hence, the reduction of the peak electric field will improve the SEB performance [25].…”
Section: Seb Simulation Results and Discussionmentioning
confidence: 99%
“…This allows the establishment of a strong avalanche rate, since the ionisation coefficients are exponentially related to the electric field. The currents thus generated lead to thermal runaway and burnout [13].…”
Section: Determination Of the Sensitive Volume In Each Devicementioning
confidence: 99%
“…Overall, for these two structures, the influence of the range can be explained only by the Kirk effect: in the case where carriers increase regeneratively until their concentrations, the displacement of the electric field (see Fig. 7), with the current density flowing through the space charge region, becomes much higher than the doping concentration of the N − epitaxial region [13,23]. For short ranges, the electric field peak moves from the P-body/N-epitaxy junction to the substrate side.…”
Section: Determination Of the Sensitive Volume In Each Devicementioning
confidence: 99%
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“…In addition, most of the earlier work studied SEB and SEGR for vertical double-diffused MOSFET (DMOS) structures. Recently, Luu et al [14] investigated the sensitive volume and triggering criteria of SEB for vertical DMOS (VDMOS) in classic planar-type technology by using different ion penetrating depths from both the front and back sides and different ionising track ranges within the structure. Zerarka et al [15] compared the sensitive volume and triggering criteria of SEB in 600 V planar and trench insulated gate bipolar transistors (IGBTs), and showed that a planar IGBT can be 100 times more sensitive and has a smaller safe operating area (SOA) compared with a trench IGBT.…”
Section: Introductionmentioning
confidence: 99%