Sensible Energy Accounting with Abstract Metering for Multicore Systems

Abstract

Chip multicore processors (CMPs) are the preferred processing platform across different domains such as data centers, real-time systems, and mobile devices. In all those domains, energy is arguably the most expensive resource in a computing system. Accurately quantifying energy usage in a multicore environment presents a challenge as well as an opportunity for optimization. Standard metering approaches are not capable of delivering consistent results with shared resources, since the same task with the same inputs may have different energy consumption based on the mix of co-running tasks. However, it is reasonable for data-center operators to charge on the basis of estimated energy usage rather than time since energy is more correlated with their actual cost. This article introduces the concept of Sensible Energy Accounting (SEA). For a task running in a multicore system, SEA accurately estimates the energy the task would have consumed running in isolation with a given fraction of the CMP shared resources. We explain the potential benefits of SEA in different domains and describe two hardware techniques to implement it for a shared last-level cache and on-core resources in SMT processors. Moreover, with SEA, an energy-aware scheduler can find a highly efficient on-chip resource assignment, reducing by up to 39% the total processor energy for a 4-core system.

SEDEA: A Sensible Approach to Account DRAM Energy in Multicore Systems

“…Users running the same applications with the same inputs would observe different energy profiles for their applications and hence, would be billed inconsistent amounts across runs. Therefore, Liu et al introduced Sensible Energy Accounting (SEA) [12], [13]. For each task T i , SEA aims at dynamically accounting (i.e.…”

“…To keep hardware overheads low, we implement a Sampled ATD (SATD), which only monitors a sampled number of sets instead of the whole LLC [13], [21]. Moreover, the SATD can also be used for pseudo-LRU caches with negligible impact on accuracy [8].…”

“…Whenever a nonsampled set is accessed, which will likely be the case of most accesses, the access can be predicted to be a hit or a miss by using a Monte Carlo approach, which offers a high degree of accuracy and can be applied to each access at execution time [13].…”

“…However, most of those overheads are inherited from previous works. Such as SATD [13], [16], [21], which has been reported to introduce around 0.7% area overhead for the LLC. In addition to that, few registers and little logic are needed by DReAM [14] and ITCA [16], which need to be in place anyway for on-chip energy accounting.…”

“…To this end, Sensible Energy Accounting (SEA) delivers an abstraction of the energy consumption of tasks in multicores discounting interferences, so that energy accounted is fair and consistent [12]. A realization of such concept for the on-chip resources has been shown by Liu et al [13], in which each task is accounted the energy it would consume when it has been allocated a particular fraction of on-chip resources. However, this work only takes into account the energy cost of on-chip resources.…”