Semiconductor–Insulator Interfaces

Hong, M.; Liu, C. T.; Reese, H.; Kwo, J.

doi:10.1002/047134608x.w3226

Cited by 13 publications

(12 citation statements)

References 78 publications

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“…2×2 cm 2 cleaved GaAs pieces were degreased by immersing into acetone and methanol for 5 min each. The surface native oxides were removed by diluted HCl etching for 3 min and the cleaned GaAs was passivated in diluted 5% (NH 4 ) 2 S aqueous solution for 15 min (S-passivated GaAs).…”

Section: Methodsmentioning

confidence: 99%

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Chen

Sun

Kim

et al. 2008

Journal of Applied Physics

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The interface between hafnium oxide grown by atomic layer deposition and (100) GaAs treated with HCl cleaning and (NH 4 ) 2 S passivation has been characterized.Synchrotron radiation photoemission core level spectra indicated successful removal of the native oxides and formation of passivating sulfides on the GaAs surface. Layer-bylayer removal of the hafnia film revealed a small amount of As 2 O 3 formed at the interface during the dielectric deposition. Traces of arsenic and sulfur out-diffusion into the hafnia film were observed after a 450 o C post-deposition anneal, and may be the origins for the electrically active defects. Transmission electron microscopy cross section images showed thicker HfO 2 films for a given precursor exposure on S-treated GaAs versus the SLAC-PUB-12802 September 2007Submitted to Journal of Applied Physics 2 non-treated sample. In addition, the valence-band and the conduction-band offsets at the HfO 2 /GaAs interface were deduced to be 3.18 eV and a range of 0.87-0.97 eV, respectively. It appears that HCl+(NH 4 ) 2 S treatments provide a superior chemical passivation for GaAs and initial surface for ALD deposition.

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Section: Methodsmentioning

confidence: 99%

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Chen

Sun

Kim

et al. 2008

Journal of Applied Physics

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“…Usually the body terminal is connected to the highest or lowest voltage within the circuit, depending on the type of the FET. The body terminal and the source terminal are sometimes connected together since the source is often connected to the highest or lowest voltage within the circuit, although there are several uses of FETs which do not have tion, such as transmission gates [2], [3], [5].…”

Section: Deposition Techniquementioning

confidence: 99%

Fabrication and Evaluation of Thin Film Transistor with Improved Electrical Characteristics

2017

IJSR

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Gallium Arsenide is a potential candidate for optoelectronic devices which can be used in Thin Film Technology with Alq 3 as gate insulator. The samples of field effect transistor are fabricated using thermal evaporation method. GaAs epilayers showed (00l) orientation with zinc blende structure and good optoelectronic quality with minimal thermoelastic/lattice mismatch strain. The device parameters have been evaluated from the characteristics. The TFTs exhibited good channel modulation and better stability Scanning electron microscopy (SEM), energy dispersive spectroscopy (EDS), X-ray powder diffraction (XRD) and the temperature dependence were used to characterize the layers.

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“…These efforts did not result in the desired Fermi level unpinning in insulator/GaAs hetero-structures. 7,8) A groundbreaking advancement in unpinning the Fermi level of GaAs was achieved using a mixed oxide of Gd 2 O 3 (Ga 2 O 3 ) [GGO] on GaAs, deposited through e-beam evaporation of a Gd 3 Ga 5 O 12 target in ultra-high vacuum (UHV). 9) This approach enabled the successful demonstration of depletion-mode (D-mode) GaAs MOSFETs with high drain current (I d ) and transconductance (G m ), 10,11) as well as the first inversion-channel GaAs MOSFET.…”

Section: Introductionmentioning

confidence: 99%

GaAs MOSFETs with in situ Y₂O₃ dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation

Liu,

Young,

Lin

et al. 2023

Jpn. J. Appl. Phys.

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Planar GaAs(100) depletion-mode (D-mode) metal-oxide-semiconductor field-effect transistors (MOSFETs) as passivated with in-situ deposited Al2O3/Y2O3 dielectric have shown enhancement of the drain current by 167% and 333% as the gate voltage (Vg ) increased from Vg = Vfb = 0.5 V to Vg = 2 V and Vg = 4 V, where Vfb is the flat-band voltage, respectively, much higher than those in the previously published GaAs-based D-mode MOSFETs. In addition, we have achieved a high Ion/Ioff of 107 and a subthreshold slope (SS) of 63 mV/dec, which approaches the thermal limit of 60 mV/dec at 300 K and is the record-low value among planar (In)GaAs MOSFETs. Moreover, using the measured SS data, we have deduced an interfacial trap density (Dit ) of 4.1 × 1011 eV-1cm-2 from our Al2O3/Y2O3/GaAs MOSFET, the lowest among the planar (In)GaAs MOSFETs.

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Semiconductor–Insulator Interfaces

Abstract: The sections in this article are Si–SiO 2 Interface Compound‐Semiconductor–Insulator Interfaces

Cited by 13 publications

References 78 publications

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Fabrication and Evaluation of Thin Film Transistor with Improved Electrical Characteristics

GaAs MOSFETs with in situ Y₂O₃ dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation

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Semiconductor–Insulator Interfaces

Abstract: The sections in this article are Si–SiO 2 Interface Compound‐Semiconductor–Insulator Interfaces

Cited by 13 publications

References 78 publications

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Hf O 2 gate dielectric on (NH4)2S passivated (100) GaAs grown by atomic layer deposition

Fabrication and Evaluation of Thin Film Transistor with Improved Electrical Characteristics

GaAs MOSFETs with in situ Y2O3 dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation

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Product

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About

GaAs MOSFETs with in situ Y₂O₃ dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation