Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis 2013
DOI: 10.1145/2503210.2503285
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Semi-automatic restructuring of offloadable tasks for many-core accelerators

Abstract: Work division between the processor and accelerator is a common theme in modern heterogenous computing. Recent efforts (such as LEO and OpenAcc) provide directives that allow the developer to mark code regions in the original application from which offloadable tasks can be generated by the compiler. Auto-tuners and runtime schedulers work with the options (i.e., offloadable tasks) generated at compile time, which is limited by the directives specified by the developer. There is no provision for offload restruc… Show more

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Cited by 8 publications
(2 citation statements)
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“…In addition, numerous compilers and productivity tools have been developed to minimize programming effort and optimize performance for a MIC system. Ravi et al [31] propose a semi-automatic method for establishing the division of work between the CPU and MIC processors by providing new directives that added relaxed semantics to directive-based languages. Song et al [32] present source-to-source compiler optimizations (Comp) that can improve the performance of applications that offload computations to manycore processors.…”
Section: Related Workmentioning
confidence: 99%
“…In addition, numerous compilers and productivity tools have been developed to minimize programming effort and optimize performance for a MIC system. Ravi et al [31] propose a semi-automatic method for establishing the division of work between the CPU and MIC processors by providing new directives that added relaxed semantics to directive-based languages. Song et al [32] present source-to-source compiler optimizations (Comp) that can improve the performance of applications that offload computations to manycore processors.…”
Section: Related Workmentioning
confidence: 99%
“…Accelerating programs to potentially 40x of their normal speed is possible by taking advantage of heterogeneous parallelization. [2] Due to the silicon wall [3] with regards to transistor sizing [4], offloading [5] calculations onto heterogeneous hardware has also become an effective solution. Heterogeneous approaches are usually composed of a traditional processor combined with dedicated hardware logic.…”
Section: Introductionmentioning
confidence: 99%