Proceedings of the 2020 Genetic and Evolutionary Computation Conference 2020
DOI: 10.1145/3377930.3390188
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Semantically-oriented mutation operator in cartesian genetic programming for evolutionary circuit design

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Cited by 11 publications
(3 citation statements)
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“…Furthermore, a search-based strategy that adopted CGP to resynthesize circuits for FPGA system design was presented in [41]. Overall, CGP provides better tradeoff metrics between hardware design parameters and error metrics than traditional methods [38], but the synthesis runtime is exceptionally high for a large number of inputs and complex nonlinear functionalities [42]. Additionally, the increased use of machine learning and artificial intelligence techniques mandates higher-order computations in 32-or 64-bit data formats [43].…”
Section: Proposed Methodsmentioning
confidence: 99%
“…Furthermore, a search-based strategy that adopted CGP to resynthesize circuits for FPGA system design was presented in [41]. Overall, CGP provides better tradeoff metrics between hardware design parameters and error metrics than traditional methods [38], but the synthesis runtime is exceptionally high for a large number of inputs and complex nonlinear functionalities [42]. Additionally, the increased use of machine learning and artificial intelligence techniques mandates higher-order computations in 32-or 64-bit data formats [43].…”
Section: Proposed Methodsmentioning
confidence: 99%
“…In addition to adders, we also include multipliers. The evolutionary design of multipliers represents probably the hardest problem due to the complexity of the multiplication itself (the multipliers consist of a sequence of adders reducing the partial products to a single output vector) [7].…”
Section: Multipliersmentioning
confidence: 99%
“…Some existing approaches proposed to address the issue of representation scalability are decomposition [1,2] and more efficient genetic operators [3]. Existing decomposition approaches break complex circuits down into evolvable sub-circuits either via inputs [2] or outputs [1] and merge them into a complete circuit using varying strategies.…”
Section: Introductionmentioning
confidence: 99%