Second-order intermodulation mechanisms in CMOS downconverters

Manstretta, Danilo; Brandolini, M.; Svelto, F.

doi:10.1109/jssc.2002.808310

Cited by 202 publications

(102 citation statements)

References 7 publications

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“…(14) has been obtained using the approximation sinc(x) ≈ 1 − 2x for small x. As D > 0, it shows that the FD estimator is stable, and converges to δ (i.e.…”

Section: Performance Of the Fd Estimation Processmentioning

confidence: 99%

“…As the uplink and the downlink bands are spectrally separated, the received signal will not be directly impaired by the leakage of the transmitted signal which is filtered by the Low Pass Filter (LPF) after the demodulation. However, due to the non linearity and imperfections of components in the analog Rx stage, especially the Low Noise Amplifier (LNA) [18] and the demodulator [14], intermodulation products can shift downward to baseband square component of the Tx Leakage signal [13]. As a consequence, this polluting signal will impair the received signal and can severely degrade the performance.…”

Section: Introductionmentioning

confidence: 99%

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Performance of Fractional Delay Estimation in Joint Estimation Algorithm Dedicated to Digital Tx Leakage Compensation in FDD Transceivers

Gerzaguet

Ros

Belvèze

et al. 2016

Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering

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Abstract. This paper deals with the performance of the fractional delay estimator in the joint complex amplitude / delay estimation algorithm dedicated to digital Tx leakage compensation in FDD transceivers. Such transceivers are affected from transmitter-receiver signal leakage. Combined with non linearity of components in the received path, it leads to a pollution in the baseband signal. The baseband polluting term depends on the equivalent Tx leakage channel, modeling leakages and the received path. We have proposed in [7,8] a joint estimation of the complex gain and the fractional delay and derived asymptotic performance of the complex gain estimator, that showed the necessity of the fractional delay estimation. In this paper, we propose a comprehensive study of the fractional delay estimation algorithm and its analytic performance. The study is based on the analysis of the S-curve and loop noise variance of the timing error detector, from which an approximation of the asymptotic performance of the joint estimation algorithm is derived.

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“…(14) has been obtained using the approximation sinc(x) ≈ 1 − 2x for small x. As D > 0, it shows that the FD estimator is stable, and converges to δ (i.e.…”

Section: Performance Of the Fd Estimation Processmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Performance of Fractional Delay Estimation in Joint Estimation Algorithm Dedicated to Digital Tx Leakage Compensation in FDD Transceivers

Gerzaguet

Ros

Belvèze

et al. 2016

Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering

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“…Mixer's linearity and 1/f noise determine the total linearity and 1/f noise in zero-IF receivers [1]. In zero-IF receivers the 2nd and 3rd order intermodulations are the most important parts of nonlinearity at the output.…”

Section: Introductionmentioning

confidence: 99%

“…Firstly, it makes an offset voltage at the output of the mixer and causes the next stages to go in saturation or cutoff mode. Secondly, the CM of IM2 current is larger than its differential part as shown by the following equation [1]:…”

Section: Introductionmentioning

confidence: 99%

A linearization technique for active mixers in zero-IF receivers with inherent balun

Barati

Yavari

2011

IEICE Electron. Express

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A new technique with two different structures for linearization of active mixers in zero-IF receivers is presented. The proposed technique improves the IIP2 more than 20 dB by removing the transconductance common mode current at the mixer's output and IIP3 more than 5 dB in comparison with a basic Gilbert-cell mixer at equal conversion gain. Also, this technique allows us to use a singleended input in a fully differential structure without needing a bulky and noisy balun. These improvements are achieved at the cost of 0.8 dB increase in NF and also 0.6 mA more current dissipation in one structure.

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“…The random mismatch between switching transistors can be modeled by an offset voltage (V Off ) [3]. The parasitic capacitor C P is charged and discharged by this offset voltage in each F LO period which F LO is the frequency of local oscillator (LO).…”

Section: Introductionmentioning

confidence: 99%

A new technique for high IIP2 reconfigurable CMOS mixer in multi-standard receivers

Vahidfar

Shoaei

2007

IEICE Electron. Express

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Abstract:A new technique for addressing the challenging dynamic range required by CMOS multi-standard Zero-IF GSM and UMTS receivers is presented in this paper. This is achieved by LC tuning of the parasitic capacitors of mixer switching transistors in different frequency bands with an easily reconfigured new integrated variable inductor. Using this technique, a high IIP2 low noise mixer supporting DCS, PCS, UMTS and IEEE802.11 b-g standards is designed. The mixer achieves IIP2 higher than 70 dBm while the input refereed noise performance is 5 and 3.5 nv/sqrt(Hz) in DCS/PCS and UMTS respectively. The design is done in 65 nm CMOS technology.

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Second-order intermodulation mechanisms in CMOS downconverters

Cited by 202 publications

References 7 publications

Performance of Fractional Delay Estimation in Joint Estimation Algorithm Dedicated to Digital Tx Leakage Compensation in FDD Transceivers

Performance of Fractional Delay Estimation in Joint Estimation Algorithm Dedicated to Digital Tx Leakage Compensation in FDD Transceivers

A linearization technique for active mixers in zero-IF receivers with inherent balun

A new technique for high IIP2 reconfigurable CMOS mixer in multi-standard receivers

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