Seamless Fabrication and Threshold Engineering in Monolayer MoS₂ Dual‐Gated Transistors via Hydrogen Silsesquioxane

Abstract

From its inception, extensive work on the characterization of field effect transistors (FETs) based on 2D‐layered semiconductors has relied on a back‐gated transistor architecture. This is useful for initial assessment but lacks ultimate compatibility with integrated circuit (IC) design since the threshold voltage of individual devices cannot be controlled independently in order to achieve specific ON‐state and OFF‐state performance. Note that threshold engineering via gate electrostatics is inevitable for 2D semiconductors owing to the absence of comprehensive, reliable, and universal doping schemes. In recent years, several strategies are adopted for the gating of individual 2D‐FETs such as atomic layer deposition (ALD) of high‐k dielectrics, drop casting of ionic liquids, and deterministic transfer of insulating 2D hexagonal boron nitride. These techniques have their respective strengths and weaknesses. A facile, low‐temperature, scalable, and universally applicable fabrication scheme for dual‐gated monolayer 2D‐FETs is reported here, which is compatible with the back‐end‐of‐the‐line (BEOL) process flow of complementary metal oxide semiconductor (CMOS) technology, using hydrogen silsesquioxane (HSQ). HSQ is a negative tone resist that possesses dielectric properties similar to SiO2 when exposed to high electron beam irradiation and thermal curing and can produce features as small as 10 nm.

Satisfiability Attack-Resistant Camouflaged Two-Dimensional Heterostructure Devices

“…The ability to obfuscate 100% of the total gates with a very low area overhead has not been previously reported with silicon-based camouflaging techniques. Furthermore, 2D materials hold tremendous promise for the post-Si age, since their atomically thin-body nature enables aggressive scaling without the detrimental consequences like short channel effects on device performance due to the quantum confinement, as the present day state-of-the-art FinFET technology hits its fundamental scaling bottleneck …”

Current‐Induced Complementary Doping to Graphene from Hydrogen Silsesquioxane Passivation Layer

“…Capping HSQ layer is cured at a low temperature of at 90 C for 1 mi and then is patterned by electron beam at a low dose of 900 μC cm À2 , which preserve the Si─H and Si─O bonds without dissociation to the maximum extent. [16,17] Figure 3a presents the temporal evolution of current density during the current annealing process. A slightly weaker current of %1.59 mA cm À2 with the power density of %12.7 Â 10 8 mW cm À2 is applied to the graphene with a constant source-drain bias V d ¼ 8 V. The total annealing time is 4 h. During the first 2 h, the current density drops eventually to a slightly lower value of %1.58 mA cm À2 .…”

“…Thermally cured HSQ has been utilized as a dielectric layer for 2D electronic devices. [17,18] So far, the HSQ-induced complementary doping has been realized in graphene using electron beam exposure during the fabrication, with which p-n junctions, [19] quantum dot devices are realized by spatially controlling the doping in graphene nanoribbons. [16,20] Controllable doping from HSQ to graphene is still desired to be realized with controls after device fabrication.…”

Gaussian synapses for probabilistic neural networks

“…2a shows the schematic representation of a reconfigurable Gaussian synapse, where, both MoS 2 and BP FETs are dual-gated (DG). The top-gate stack was fabricated using hydrogen silsesquioxane (HSQ) 52,53 as the top-gate dielectric with nickel/gold (Ni/Au) as the top-gate electrode. The fabrication process flow is described in the experimental method section.…”