2020
DOI: 10.1109/tpds.2019.2929048
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Scheduling Parallel Real-Time Tasks on the Minimum Number of Processors

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Cited by 16 publications
(4 citation statements)
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References 39 publications
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“…In [22], the authors try to reduce the hardware cost by minimize the number of required processors to schedule an application, where considerably memory requirements and application latency are reduced by comparing with related approaches while meeting the same throughput constraint. In [23], the authors shows how to minimize the number of required processors for feasible running the parallel real-time tasks. However, our work considers to minimize security-enhancing related hardware cost of ACPS by minimizing the number of HSMs, where both security and real-time requirements are considered.…”
Section: Related Workmentioning
confidence: 99%
“…In [22], the authors try to reduce the hardware cost by minimize the number of required processors to schedule an application, where considerably memory requirements and application latency are reduced by comparing with related approaches while meeting the same throughput constraint. In [23], the authors shows how to minimize the number of required processors for feasible running the parallel real-time tasks. However, our work considers to minimize security-enhancing related hardware cost of ACPS by minimizing the number of HSMs, where both security and real-time requirements are considered.…”
Section: Related Workmentioning
confidence: 99%
“…For FFT application, the number of tasks is |N| = (2 × ρ − 1) + ρ × log 2 ρ, and ρ = 2 x where x is an integer. We can see that there are four exit tasks (task 12,13,14,15) in the FFT graph in Figure 2a, and there will be ρ exit tasks in the FFT graph with parameter ρ. In order to match the application model in Section 3.1, we add a dummy exit task whose execution time is 0.…”
Section: Fast Fourier Transform Applicationmentioning
confidence: 99%
“…Therefore, energy consumption is one of the main design constraints for such heterogeneous multi-core systems. A well-known typical mechanism for reducing power consumption of computing systems is dynamic voltage and frequency scaling (DVFS), which is realized to achieve the balance between energy consumption and performance by reducing the power supply voltage and frequency of the processor at the same time, when the task is running [1,[14][15][16][17][18][19]. Therefore, energy consumption constrained task scheduling on processors with adjustable voltage and frequency has attracted extensive research [20][21][22][23].…”
Section: Introductionmentioning
confidence: 99%
“…A parallel real-time task can be modelled as a directed acyclic graph (DAG) containing nodes and edges, where nodes and edges correspond to subtasks and their precedence constraints, respectively [1,2]. DAG tasks have many applications including cloud data centres and unmanned aerial vehicles [3]. For DAG-based real-time task models, we propose a decomposition algorithm to improve the schedulability of Earliest Deadline First (EDF), which is one of the well-known real-time scheduling algorithms.…”
mentioning
confidence: 99%