Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

Resta, Giovanni V.; Agarwal, Tarun; Lin, Dennis; Radu, Iuliana; Catthoor, Francky; Gaillardon, Pierre-Emmanuel; Micheli, Giovanni De

doi:10.1038/srep45556

Cited by 15 publications

(13 citation statements)

References 41 publications

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“…2D semiconductors are well-suited for this purpose, as the existence of a band gap permits the material to be depleted of charge carriers. For example, it is observed that a high semiconducting band-gap (∼1.5 eV and 1.1 eV, respectively) prevents achieving high ON-currents in mono-and bi-layer WSe 2 [19]. This can be seen in Table ??…”

Section: Multilayer Tmdfetsmentioning

confidence: 92%

Layered TMDFETS for Nano Devices: A Short Review

Dhar

Pattanaik

2019

Jour. Atomic Mole. Conden. Nano Phys.

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Two-dimensional semiconducting materials of the transition-metal-dichalcogenide (TMD) family, such as MoS 2 and WSe 2 , have been intensively investigated in the past few years, and are considered as workable contenders for next-generation electronic devices. In this very brief review, we provide an evaluation of devices based on monolayer and multi layer two-dimensional materials, outlining their prospects as a technological option for low power transistor designs. Our study revealed that the two dimensional transition-metal-dichalcogenide are versatile materials which may be used as a single layer or multi layered with diverse properties enabling to suit a wide range of low power applications. Further study divulges that experimental investigations of monolayer TMD transistors encourage workers with excellent carrier mobilities required for low power applications, whereas multilayer TMD transistors reveal WS 2 to be an excellent channel material for making of high performance FET required for energy efficient electronic applications. We understand that this work will provide an important step towards the design and performance evaluation of FETs in low power applications based on two-dimensional materials. Further, the results obtained due to the TMDs so far, prove beneficial to both states of FET operation i.e. ON state and OFF state, when compared to conventional materials.

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Section: Multilayer Tmdfetsmentioning

confidence: 92%

Layered TMDFETS for Nano Devices: A Short Review

Dhar

Pattanaik

2019

Jour. Atomic Mole. Conden. Nano Phys.

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“…The control gate (CG), in the inner region, regulates the channel conduction, whereas the polarity gate at source (PGS) and the polarity gate at drain (PGD) modulate the Schottky barrier to, respectively, allow electrons or holes to flow into the channel. This technology has been demonstrated in the literature with multiple channel geometries and materials, such as silicon nanowire structures [10], [12], silicon fin structures [13], 2-D materials [14], [16], [17], and carbon nanotubes [18]. In addition, performance at aggressive scaling nodes was estimated using ballistic selfconsistent quantum simulations [17] on 2-D materials from the transition-metal-dichalcogenide family and showed possibilities for TIGFETs to achieve high-current densities.…”

Section: A Generalitiesmentioning

confidence: 99%

“…This technology has been demonstrated in the literature with multiple channel geometries and materials, such as silicon nanowire structures [10], [12], silicon fin structures [13], 2-D materials [14], [16], [17], and carbon nanotubes [18]. In addition, performance at aggressive scaling nodes was estimated using ballistic selfconsistent quantum simulations [17] on 2-D materials from the transition-metal-dichalcogenide family and showed possibilities for TIGFETs to achieve high-current densities. Fully exploiting a doping-free process, TIGFETs also bear the promise of improved robustness to process variations as identified in [19].…”

Section: A Generalitiesmentioning

confidence: 99%

BCB Evaluation of High-Performance and Low-Leakage Three-Independent-Gate Field-Effect Transistors

Romero-González¹,

Gaillardon²

2018

IEEE J. Explor. Solid-State Comput. Devices Circuits

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Three-independent-gate field-effect transistors (TIGFETs) are a promising next-generation device technology. Their controllable-polarity capability allows for superior design of arithmetic and sequential logic gates. In this paper, the TIGFET technology has been benchmarked against several beyond-CMOS devices. The benchmarking techniques followed a similar approach used by the Nanoelectronic Research Initiative Group. The performance of the 32-bit adder and the 32-bit arithmetic logic unit (ALU) was investigated using the advanced 15-nm technology node. The TIGFET devices were shown to achieve the best energy-delay product (EDP) compared with all other beyond-CMOS devices for the 32-bit adder and competitive EDP for the 32-bit ALU. In particular, TIGFETs have 3.83 times and 1.54 times lower EDP than CMOS high-performance (HP) for the 32-bit adder and the 32-bit ALU, respectively. In addition, TIGFETs were shown to have a similar throughput for the 32-bit ALU compared with CMOS HP. Finally, due to TIGFETs' ultralow leakage current and unique circuit designs, our results show that the standby energy of the 32-bit adder decreased by two orders of magnitude compared with CMOS HP and a decrease of at least one order of magnitude compared with CMOS low-voltage.INDEX TERMS Arithmetic logic gate, beyond-CMOS, gate-all-around, silicon nanowire field-effect transistor (SiNWFET), three-independent-gate.

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“…A solution for thus enhancing the device performance and their extreme thinness alleviate shortchannel effects with this technology [17], the fabrication of double gate device which need complicated technology and has been not deserving a complete special attention irrespective has been very expensive [18].…”

Section: Introductionmentioning

confidence: 99%

A modeling and performance of the triple field plate HEMT

Kourdi¹,

Hamdoun²

2019

IJPEDS

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We present this work by two steps. In the first one, the new structure proposed of the FP-HEMTs device (Field plate High Electron Mobility Transistor) with a T-gate on an 4H-SIC substrate to optimize these electrical performances, multiple field-plates were used with aluminum oxide to split the single electric field peak into several smaller peaks, and as passivation works to reduce scaling leakage current. In the next, we include a modeling of a simulation in the Tcad-Silvaco Software for realizing the study of the influence of negative voltage applied to gate T-shaped in OFF state time and high power with ambient temperature, the performance differences between the 3FP and the SFP devices are discussed in detail.

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Scaling trends and performance evaluation of 2-dimensional polarity-controllable FETs

Cited by 15 publications

References 41 publications

Layered TMDFETS for Nano Devices: A Short Review

Layered TMDFETS for Nano Devices: A Short Review

BCB Evaluation of High-Performance and Low-Leakage Three-Independent-Gate Field-Effect Transistors

A modeling and performance of the triple field plate HEMT

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