Scaling issues in the evolution of ExCL bipolar technology

Silicon bipolar junction transistors (EJT's) are widely used for various circuit applications, from small, high speed to high density VLSI circuits. There is no single process which is suitable for all these applications. Device and process designs may generally be optimized only for a given class of circuits at specific power dissipation levels and lithographic line widths.New processes such as polysilicon emitter, various selfalignment schemes and deep trench isolation have lead to siflicant improvements in intrinsic speed and reductions in parasitic RC elements in silicon BJT devices. Some basic physical limitations involved in further scaling the intrinsic device vertical profile for silicon BJT's will be discussed, and this will lead to a review of recent developments in silicon based heterojunction bipolar transistors (HBT's), which have the potential of overcoming some of the basic limitations in homojunction BJT's.

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On-die parasitic effects and their impact on high-speed bipolar IC design

Gailus

Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting

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Scaling issues in the evolution of ExCL bipolar technology

Cited by 5 publications

References 10 publications

Isolation Technology in Monolithic Integrated Circuits: An Overview

Isolation Technology in Monolithic Integrated Circuits: An Overview

Bipolar device design for circuit performance optimization

On-die parasitic effects and their impact on high-speed bipolar IC design

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