Scaling analysis of a neocortex inspired cognitive model on the Cray XD1

Abstract

This paper presents the implementation and scaling of a neocortex inspired cognitive model on a Cray XD1. Both software and reconfigurable logic based FPGA implementations of the model are examined. This model belongs to a new class of biologically inspired cognitive models. Large scale versions of these models have the potential for significantly stronger inference capabilities than current conventional computing systems. These models have large amounts of parallelism and simple computations, thus allowing highly efficient hardware implementations. As a result, hardware-acceleration of these models can produce significant speedups over fully software implementations. Parallel software and hardware-accelerated implementations of such a model are investigated for networks of varying complexity. A scaling analysis of these networks is presented and utilized to estimate the throughput of both hardware-accelerated and software implementations of larger networks that utilize the full resources of the Cray XD1. Our results indicate that hardware-acceleration can provide average throughput gains of 75 times over software-only implementations of the networks we examined on this system.

Practical scalable image analysis and indexing using Hadoop

“…These difficulties notwithstanding, there have been several machine learning techniques translated successfully to work in parallel on FPGAs, all reporting significant improvements over standard software implementations on conventional CPU architectures. This includes a neurologically inspired hierarchical bayesian model used for invariant object recognition [42], an implementation of the RankBoost for web search relevance ranking [48] and a low-precision implementation of Support Vector Machines using Sequential Minimal Optimisation [8].…”

Profiling Heterogeneous Multi-GPU Systems to Accelerate Cortically Inspired Learning Algorithms

“…Rice et al [25] have proposed a neocortex-inspired cognitive model on the Cray XD1 supercomputer. The HTM, based on a hierarchical Bayesian network model proposed in [11], uses advanced software and reconfigurable hardware implementations to scale a model based on the human visual cortex to interesting problems.…”

“…The HTM, based on a hierarchical Bayesian network model proposed in [11], uses advanced software and reconfigurable hardware implementations to scale a model based on the human visual cortex to interesting problems. Like ourselves, Rice et al [25] take advantage of a massive amount of inherent parallelism in a model based on the neocortex. However, as described above, our implementation of a neocortex-inspired model does not use Bayesian inference.…”

CMOL/CMOS Implementations of Bayesian Polytree Inference: Digital and Mixed-Signal Architectures and Performance/Price

“…is still struggling to achieve system-level "general-purpose artificial intelligence" [12]. But recently, the computational neuroscience community has begun developing scalable Bayesian models (based on Bayesian framework [13]- [15]) that have the potential of being applied to large-scale applications, such as, speech recognition, computer vision, image content recognition, robotic control, and making sense of massive quantities of data [4], [16]. Some of these new algorithms are ideal candidates for largescale hardware investigation (and future implementation), especially if they can leverage the high-density processing/storage advantages of hybrid nanoelectronics [1], [3].…”

“…The recent work by Rice et al [16], [25] and Vutsinas et al [26] explores the combined implementations in regions 3 and 4, for the GHM [13]. At this time, we are not aware of any work on custom hardware implementation of the GHM [13].…”