2019
DOI: 10.1021/acsami.8b19410
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Scalable Manufacturing of Single Nanowire Devices Using Crack-Defined Shadow Mask Lithography

Abstract: Single nanowires (NWs) have a broad range of applications in nanoelectronics, nanomechanics, and nanophotonics, but, to date, no technique can produce single sub-20 nm wide NWs with electrical connections in a scalable fashion. In this work, we combine conventional optical and crack lithographies to generate single NW devices with controllable and predictable dimensions and placement and with individual electrical contacts to the NWs. We demonstrate NWs made of gold, platinum, palladium, tungsten, tin, and met… Show more

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Cited by 21 publications
(11 citation statements)
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References 60 publications
(92 reference statements)
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“…This combination of material and dimensions was investigated before and found to be suitable to enable domain wall nucleation and propagation by a local rotating magnetic field of the frequency chosen here [39]. Such nanostructures can be produced by e-beam lithography or similar methods from different materials, typically on Si wafers or other non-magnetic flat surfaces, but also in a free-standing form [40][41][42]. Micromagnetic simulations are performed with four input combinations, defined by in-plane rotating fields: LL, LR, RL, and RR, where L = counterclockwise and R = clockwise.…”
Section: Methodsmentioning
confidence: 99%
“…This combination of material and dimensions was investigated before and found to be suitable to enable domain wall nucleation and propagation by a local rotating magnetic field of the frequency chosen here [39]. Such nanostructures can be produced by e-beam lithography or similar methods from different materials, typically on Si wafers or other non-magnetic flat surfaces, but also in a free-standing form [40][41][42]. Micromagnetic simulations are performed with four input combinations, defined by in-plane rotating fields: LL, LR, RL, and RR, where L = counterclockwise and R = clockwise.…”
Section: Methodsmentioning
confidence: 99%
“…Semiconductor nanowires can be obtained by various methods, which are generally classified as either top-down or bottom-up strategies. , In the top-down strategy, the nanowires are usually fabricated at the surface of bulk materials with well-defined locations, which are realized through a combination of lithography, etching, doping, and deposition processes. Although, advanced lithography approaches available today can be readily used for fabricating nanowires in the deep nanometer regime, which often exhibit atomic-scale roughness, , posing a considerable challenge for continued scaling in the deep nanometer regime. Additionally, the rapidly increasing cost of the fabrications with further improved lithography resolution is also becoming a critical limiting factor for top-down strategies.…”
Section: Synthesis Of Semiconductor Nanowires and Heterostructuresmentioning
confidence: 99%
“…A large‐area, uniform crack network could be generated through spraying solution onto the substrate, and composed a well‐distributed, highly conductive metal wire network with metal deposition on it 93 . The nanowire conductive network based on crack structure possessed superb conductivity and mechanical flexibility, not to mention the properties of a simple fabrication process and low cost.…”
Section: Crack‐based Flexible Pressure Sensorsmentioning
confidence: 99%