Scalable, efficient, and secure RFID with elliptic curve cryptosystem for Internet of Things in healthcare environment

Noori, Davood; Shakeri, Hassan; Torshiz, Masood Niazi

doi:10.1186/s13635-020-00114-x

Cited by 24 publications

(15 citation statements)

References 51 publications

(90 reference statements)

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“…In IoT-based healthcare, studies on encryption and authentication protocols for user 8 Mobile Information Systems Figure 6: Keyword co-occurrence network obtained using VOSviewer. Mobile Information Systems authentication [120][121][122][123] and data encryption for patient privacy protection [124][125][126][127] are relevant. Safe and efficient medical data retrieval is important for remote medical monitoring.…”

Section: Keyword Clustering and Evolution Of Research On Iotmentioning

confidence: 99%

Current Research Trends in IoT Security: A Systematic Mapping Study

Lee

2021

Mobile Information Systems

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The smart mobile Internet-of-things (IoT) network lays the foundation of the fourth industrial revolution, the era of hyperconnectivity, hyperintelligence, and hyperconvergence. As this revolution gains momentum, the security of smart mobile IoT networks becomes an essential research topic. This study aimed to provide comprehensive insights on IoT security. To this end, we conducted a systematic mapping study of the literature to identify evolving trends in IoT security and determine research subjects. We reviewed the literature from January 2009 to August 2020 to identify influential researchers and trends of keywords. We additionally performed structural topic modeling to identify current research topics and the most promising ones via topic trend estimation. We synthesized and interpreted the results of the systematic mapping study to devise future research directions. The results obtained from this study are useful to understand current trends in IoT security and provide insights into research and development of IoT security.

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Section: Keyword Clustering and Evolution Of Research On Iotmentioning

confidence: 99%

Current Research Trends in IoT Security: A Systematic Mapping Study

Lee

2021

Mobile Information Systems

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“…Subsequently, these tags cannot utilize the energy-demanding asymmetric algorithms such as the Rivest-Shamir-Adleman (RSA) algorithm. Consequently, the Elliptic-curve Cryptography (ECC) algorithms are employed in many RFID applications due to their advantages over the traditional asymmetric algorithms [15,16]. For example, ECC offers smaller key sizes as compared to the RSA for the same security, i.e., the security of 163-bit ECC is considered equivalent to 1024-bits RSA [11].…”

Section: Introductionmentioning

confidence: 99%

“…In addition, two types of coordinate systems, i.e., affine and projective, are involved. The latter is more frequently used to optimize the time required to perform one PM computation [16,18]. Additionally, two field representations, i.e., the prime (GF(P)) and binary (GF(2 m )), are available.…”

Section: Introductionmentioning

confidence: 99%

Elliptic-Curve Crypto Processor for RFID Applications

et al. 2021

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This work presents an Elliptic-curve Point Multiplication (ECP) architecture with a focus on low latency and low area for radio-frequency-identification (RFID) applications over GF(2163). To achieve low latency, we have reduced the clock cycles by using: (i) three-shift buffers in the datapath to load Elliptic-curve parameters as well as an initial point, (ii) the identical size of input/output interfaces in all building blocks of the architecture. The low area is preserved by using the same hardware resources of squaring and multiplication for inversion computation. Finally, an efficient controller is used to control the inferred logic. The proposed ECP architecture is modeled in Verilog and the synthesis results are given on three different 7-series FPGA (Field Programmable Gate Array) devices, i.e., Kintex-7, Artix-7, and Virtex-7. The performance of the architecture is provided with the integration of a schoolbook multiplier (implemented with two different logic styles, i.e., combinational and sequential). On Kintex-7, the combinational implementation style of a schoolbook multiplier results in power-optimized, i.e., 161 μW, values with an expense of (i) hardware resources, i.e., 3561 look-up-tables and 1527 flip-flops, (ii) clock frequency, i.e., 227 MHz, and (iii) latency, i.e., 11.57 μs. On the same Kintex-7 device, the sequential implementation style of a schoolbook multiplier provides, (i) 2.88 μs latency, (ii) 1786 look-up-tables and 1855 flip-flops, (iii) 647 μW power, and (iv) 909 MHz clock frequency. Therefore, the reported area, latency and power results make the proposed ECP architecture well-suited for RFID applications.

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“…The applications that require software implementations are (i) OpenSSL protocols [6], (ii) bitcoin digital signatures [7], (iii) image encryption/ decryption [8,9], and many others. Similarly, the applications that require hardware implementations of ECC are (i) internet of things [10], (ii) radio frequency identification [11,12], (iii) teleoperated robotic systems [13], (iv) network servers [14], and several others. The applications highlighted in [10][11][12][13] require low-cost (or area optimized) implementations.…”

Section: Introductionmentioning

confidence: 99%

“…Similarly, the applications that require hardware implementations of ECC are (i) internet of things [10], (ii) radio frequency identification [11,12], (iii) teleoperated robotic systems [13], (iv) network servers [14], and several others. The applications highlighted in [10][11][12][13] require low-cost (or area optimized) implementations. On the other hand, high-speed implementations are required for network related applications where multiple devices want to communicate using a cloud platform.…”

Section: Introductionmentioning

confidence: 99%

A Novel Low-Area Point Multiplication Architecture for Elliptic-Curve Cryptography

et al. 2021

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This paper presents a Point Multiplication (PM) architecture of Elliptic-Curve Cryptography (ECC) over GF(2163) with a focus on the optimization of hardware resources and latency at the same time. The hardware resources are reduced with the use of a bit-serial (traditional schoolbook) multiplication method. Similarly, the latency is optimized with the reduction in a critical path using pipeline registers. To cope with the pipelining, we propose to reschedule point addition and double instructions, required for the computation of a PM operation in ECC. Subsequently, the proposed architecture over GF(2163) is modeled in Verilog Hardware Description Language (HDL) using Vivado Design Suite. To provide a fair performance evaluation, we synthesize our design on various FPGA (field-programmable gate array) devices. These FPGA devices are Virtex-4, Virtex-5, Virtex-6, Virtex-7, Spartan-7, Artix-7, and Kintex-7. The lowest area (433 FPGA slices) is achieved on Spartan-7. The highest speed is realized on Virtex-7, where our design achieves 391 MHz clock frequency and requires 416 μs for one PM computation (latency). For power, the lowest values are achieved on the Artix-7 (56 μW) and Kintex-7 (61 μW) devices. A ratio of throughput over area value of 4.89 is reached for Virtex-7. Our design outperforms most recent state-of-the-art solutions (in terms of area) with an overhead of latency.

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Scalable, efficient, and secure RFID with elliptic curve cryptosystem for Internet of Things in healthcare environment

Cited by 24 publications

References 51 publications

Current Research Trends in IoT Security: A Systematic Mapping Study

Current Research Trends in IoT Security: A Systematic Mapping Study

Elliptic-Curve Crypto Processor for RFID Applications

A Novel Low-Area Point Multiplication Architecture for Elliptic-Curve Cryptography

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