Scalable architecture for a contention-free optical network on-chip

Koohi, Somayyeh; Hessabi, Shaahin

doi:10.1016/j.jpdc.2012.02.003

Cited by 15 publications

(12 citation statements)

References 29 publications

(60 reference statements)

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“…Optical links, on the other hand, require E/O and O/E conversions and on-the-fly propagation delay (t prop ), which take at least one clock cycle each (3 cycles in total). However, optical links leverage the signal propagation of light (11.4ps/mm for current technologies [14]), which is particularly beneficial for long-distance communication, especially because optical links, as opposed to electrical, do not require pipelining and do not introduce further distance-related latencies. For instance, with 11.4ps/mm propagation delay, data can be sent within one clock cycle to any core located at distances < 17.5mm assuming a core clock frequency of 5Ghz (200ps clock cycle).…”

Section: Latencymentioning

confidence: 99%

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Werner¹,

Navaridas²,

Luján³

2017

2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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Optical on-chip communication is considered a promising candidate to overcome latency and energy bottlenecks of electrical interconnects. Although recently proposed hybrid Networks-on-chip (NoCs), which implement both electrical and optical links, improve power efficiency, they often fail to combine these two interconnect technologies efficiently and suffer from considerable laser power overheads caused by high-bandwidth optical links. We argue that these overheads can be avoided by inserting a higher quantity of low-bandwidth optical links in a topology, as this yields lower optical loss and in turn laser power. Moreover, when optimally combined with electrical links for short distances, this can be done without trading off latency. We present the effectiveness of this concept with Lego, our hybrid, mesh-based NoC that provides high power efficiency by utilizing electrical links for local traffic, and low-bandwidth optical links for long distances. Electrical links are placed systematically to outweigh the serialization delay introduced by the optical links, simplify router microarchitecture, and allow to save optical resources. Our routing algorithm always chooses the link that offers the lowest latency and energy. Compared to state-of-the-art proposals, Lego increases throughputper-watt by at least 40%, and lowers latency by 35% on average for synthetic traffic. On SPLASH-2/PARSEC workloads, Lego improves power efficiency by at least 37% (up to 3.5×).

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Section: Latencymentioning

confidence: 99%

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Werner¹,

Navaridas²,

Luján³

2017

2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)

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“…Non-blocking WRONoC topologies [24]- [27] provide simultaneous switching capability from each sender to each receiver. However, this requires (N − 1) filter-detector pairs (for N nodes) at each node, leading to a very limited scalability: µRing heater power and area increase quadratically with N. To tackle this issue, several blocking WRONoCs [28], [29]-including Amon [4]-have been proposed. These require only one filter-detector pair at each node and resolve contention by using a control network (CN).…”

Section: Related Workmentioning

confidence: 99%

“…Furthermore, laser power is reduced by sharing wavelengths for addressing and providing collision-free paths in the network. CoNoC [28] first introduced this principle and has N/2 wavelengths for addressing. QuT [29] significantly improves upon CoNoC by splitting the wavelengths to N/4.…”

Section: Related Workmentioning

confidence: 99%

Efficient Sharing of Optical Resources in Low-Power Optical Networks-on-Chip

Werner¹,

Navaridas²,

Luján³

2017

J. Opt. Commun. Netw.

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Abstract-With the ever-growing core counts in modern computing systems, NoCs consume an increasing part of the power budget due to bandwidth and power density limitations of electrical interconnects. To maintain performance and power scaling, alternative technologies are required, with silicon photonics being a promising candidate thanks to high-bandwidth, low-energy data transmission. In order to get the best of silicon photonics, sophisticated network designs are required to minimize static power overheads. In this paper, we propose Amon, a low-power ONoC that decreases number of µRings, wavelengths and path losses to reduce power consumption. Amon performs destination checking prior to data transmission on an underlying control network, allowing the sharing of optical bandwidth. Compared to a wide range of state-of-the-art optical, hybrid, and electrical NoCs, Amon improves Throughputper-Watt by at least 23% (up to 70%), while reducing power without latency overheads on both synthetic and realistic applications. For aggressive optical technology parameters, Amon considerably outperforms all alternative NoCs in terms of power, outlining its increasing superiority as technology matures.

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“…The optical Spidergon [10] is based on the Spidergon topology, which is a ring topology where, in addition to the ring, opposite nodes are connected. It uses an electrical control network, which could, however, be replaced by common optical control network solutions such as an MWSR bus.…”

Section: Related Workmentioning

confidence: 99%

“…Spidergon [10] and QuT [7] are recently proposed oNoC architectures, but both of them fail to scale particularly well according to the above challenges. Amon is an alternative, all-optical NoC design that overcomes their limitations as it targets low power and energy consumption by addressing these key issues.…”

Section: Introductionmentioning

confidence: 99%

Amon: An Advanced Mesh-like Optical NoC

Werner

Navaridas

Luján

2015

2015 IEEE 23rd Annual Symposium on High-Performance Interconnects

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Abstract-Optical Networks-on-chip constitute a promising approach to tackle the power wall problem present in largescale electrical NoC design. In order to enable their adoption and ensure scalability, oNoCs have to be carefully designed with power and energy consumption in mind. In this paper, we propose Amon, an all-optical NoC design based on passive microrings and Wavelength Division Multiplexing, including the switch architecture and a contention-free routing algorithm. The goal is to obtain a design that minimizes the total number of wavelengths and microrings, the wiring complexity and the diameter. An analytical comparison with state-of-the-art design proposals of all-optical NoCs shows that the proposed design can substantially improve the most important performance metrics: hop counts, chip area, energy and power consumption. Our experimental work confirms that this improvement translates into higher performance and efficiency. Finally, our design provides a tile-based structure which should facilitate VLSI integration when compared with recent ring-like solutions. In general we show it provides a more scalable solution than previous designs.

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Scalable architecture for a contention-free optical network on-chip

Cited by 15 publications

References 29 publications

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Efficient Sharing of Optical Resources in Low-Power Optical Networks-on-Chip

Amon: An Advanced Mesh-like Optical NoC

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