SAT-Based Counterexample-Guided Inductive Synthesis of Distributed Controllers

Abstract

This article proposes a new method for automatic synthesis of distributed discrete-state controllers from given temporal specification and behavior examples. The proposed method develops known synthesis methods to the distributed case, which is a fundamental extension. This method can be applied for automatic generation of correct-by-design distributed control software for industrial automation. The proposed approach is based on reduction to the Boolean satisfiability problem (SAT) and has Counterexample-Guided Inductive Synthesis (CEGIS) at its core. We evaluate the proposed approach using the classical distributed alternating bit protocol.

Combinatorial Sequence Testing Using Behavioral Programming and Generalized Coverage Criteria

“…The alternating-bit protocol (ABP) [12] is a classical full-duplex protocol that sends data from sender to receiver on an unreliable communication channel. It is a standard benchmark for formal verification and modeling [13]. The ABP protocol starts by sending a data packet (the 'send' event in our model) and repeats sending this packet until receiving an acknowledgment ('ackOK').…”