“…The two large digital ASICS in 0.7 mm complementary metal oxide semiconductor (CMOS) of the first generation, for the PMD and TC layers, were merged in the second generation. In the third generation the SACHEM performed all digital transceiver functions in 450 kgates, with a size of 70 mm 2 , 4.8 million transistors, 800 mW in 0.35 mm CMOS, and still only 35 MHz as master clock [8]. Also, the analog component has been optimized and shrunk [9].…”