Run-Time Services for Hybrid CPU/FPGA Systems on Chip

Abstract

Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-programmable chip (MPSoPC) architectures. As researchers are investigating new methods for migrating portions of applications into custom hardware circuits, it is also critical to develop new run-time service frameworks to support these capabilities. Hthreads (HybridThreads) is a multithreaded RTOS kernel for hybrid FPGA/CPU systems designed to meet this new growing need. A key capability of hthreads is the migration of thread management, synchronization primitives, and run-time scheduling services for both hardware and software threads into hardware. This paper describes the hthreads scheduler, a key component for controlling both software-resident threads (SW threads) and threads implemented in programmable logic (HW threads). Run-time analysis shows that the hthreads scheduler module helps in reducing unwanted system overhead and jitter when compared to historical software schedulers, while fielding scheduling requests from both hardware and software threads in parallel with application execution. Run time analysis shows the scheduler achieves constant time scheduling for up to 256 active threads with a total of 128 different priority levels, while using uniform APIs for threads requesting OS services from either side of the hardware/software boundary.

Using hardware methods to improve time-predictable performance in real-time Java systems

“…Therefore, the challenge addressed in this paper is the implementation of the most important features of previous work with minimal overhead. These are (1) method-oriented access to co-processor functionality, (2) parameter and return value passing and (3) JNI-like access to Java objects in memory. This section presents an abstract overview of hardware methods, which represent co-processor functionality in a manner that is analogous to the native methods implemented through JNI.…”

“…A popular approach involves the use of application-specific coprocessors, which carry out otherwise CPU-intensive tasks within dedicated hardware [2,4,5,11,31]. The hardware is able to carry out work in less time and using less energy than equivalent software on a CPU through specialization and use of low-level parallelism.…”

Automating the design of mLUT MPSoPC FPGAs in the cloud

“…Although flexible, RPC mechanisms are typically implemented using heavyweight interrupt and exception mechanisms. We developed the hthreads operating system to direclty resolve heterogeneous incompatibilities and provide a precise real-time performance envelope for embedded systems [6,7]. Hthreads resolved ISA incompatibilities by providing a system of processor-agnostic (ISA-neutral) thread management, scheduling, and synchronization services implemented as hardware cores.…”

“…Hthreads resolved ISA incompatibilities by providing a system of processor-agnostic (ISA-neutral) thread management, scheduling, and synchronization services implemented as hardware cores. Figure 4 shows the 4 major hardware cores that comprise the backbone of the hthreads system: the Thread Manager, Scheduler, Synchronization Manager, and Condition Variables [6,7]. This modular partitioning breaks up the traditional monolithic kernel structure allowing separation of concerns between different OS service cores.…”

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“…Programming models for hybrid CPU/FPGA systems were studied in D. Andrews et Al. [2004] Peck et Al. [2006.…”