Routing Schemes for the Augmented Data Manipulator Network in an MIMD System

McMillen,; Siegel,

doi:10.1109/tc.1982.1675944

Cited by 70 publications

(26 citation statements)

References 18 publications

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“…The routing tag defined can only specify strictly dominant paths. Given a source address S and a routing tag T = tntn_1...to, the value of the destination address D is calculated as [12]: t D = S + (-I) n(tn_12n-1 + ... + t020) mod N.…”

Section: Summary Of Previous Resultsmentioning

confidence: 99%

“…Then T' is equivalent to T [12]. This allows conversion from a strictly positive dominant tag to a strictly negative dominant tag, and vice versa.…”

Section: Summary Of Previous Resultsmentioning

confidence: 99%

“…It has been shown that there are three different methods for dynamically switching (rerouting) between these various paths [12]. One of those methods is if a message becomes blocked by a ±21 link, 0<i<n-2, it can be sent on the oppositely signed link if the routing tag is replaced by the equivalent tag of opposite dominance [12].…”

Section: Summary Of Previous Resultsmentioning

confidence: 99%

“…One of those methods is if a message becomes blocked by a ±21 link, 0<i<n-2, it can be sent on the oppositely signed link if the routing tag is replaced by the equivalent tag of opposite dominance [12]. This is not used in stage n-1 since routing +2 n-1 is the same as routing -2 n-1.…”

Section: Summary Of Previous Resultsmentioning

confidence: 99%

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Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network

McMillen

Siegel

1982

SIGARCH Comput. Archit. News

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The Inverse Augmented Data Manipulator (IADM) is a multistage interconnection network based on the Augmented Data Manipulator (ADM) and Feng's data manipulator.It is designed to be used in largescale parallel/distributed processing systems for communication among processors, memories, and other system devices.Two aspects of IADM network design are discussed:performance and fault tolerance. A single stage look-ahead scheme for predicting blockage is presented to enhance performance.Next, one method of adding some links to the network to enable it to tolerate one link failure is described.Finally, a different method of adding links is shown that both improves performance and allows the network to tolerate two switching element or two link failures.Included is a new routing tag scheme that accommodates the new links.

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Section: Summary Of Previous Resultsmentioning

confidence: 99%

“…Then T' is equivalent to T [12]. This allows conversion from a strictly positive dominant tag to a strictly negative dominant tag, and vice versa.…”

Section: Summary Of Previous Resultsmentioning

confidence: 99%

Section: Summary Of Previous Resultsmentioning

confidence: 99%

Section: Summary Of Previous Resultsmentioning

confidence: 99%

See 2 more Smart Citations

Performance and fault tolerance improvements in the Inverse Augmented Data Manipulator network

McMillen

Siegel

1982

SIGARCH Comput. Archit. News

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“…The switch elements at each stage are interconnected by the PM2'(Plus-Minus 21) interconnection method [6] [4]. The P-th switch element on the left of the i-th stage is interconnected to the switch element on the right of the i-th stage by the following relation:.…”

Section: Gamma and Igamma Networkmentioning

confidence: 99%

ATM Switch with GAMMA Network; Provision of Multiple Paths

Kim

Hong

Cho

et al. 1995

Local and Metropolitan Communication Systems

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We propose an ATM switch architecture using the multistage interconnection network based on the GAMMA network. Consisting of 3 x 3 crossbar switch elements, the GAMMA network provides multiple paths. For this reason, this switch can be constructed without any sorting network which is required for other space division ATM switches based on the delta or banyan networks in order to avoid internal blocking. Most of the space division switches deteriorate switch performance when internal switch elements or interconnection links fail because they only one path between input and ouput ports. The proposed switch, however, has reliabilty by providing multiple paths with the GAMMA network.This switch architecture has two network planes: the upper and lower plane. The upper plane is used for searching for the paths of the request cells, whearas the lower plane is used for routing the information cells. Since the switch can negotiate possible paths for next cell while one cell is routed through the lower plane, we can utilize the characteristics of the multiple paths in GAMMA network. Finally we show the performance of this switch by simulation.

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