Room temperature electroless plating copper seed layer process for damascene interlevel metal structures

O’Kelly, Joseph P.; Mongey, K.F.; Gobil, Y.; Torrès, J.; Kelly, P.V.; Crean, G.M.

doi:10.1016/s0167-9317(99)00317-2

Cited by 51 publications

(29 citation statements)

References 8 publications

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“…A 10 Ϫ3 M combined Pd/HF solution used in this study was proposed by Patterson et al 8 The HF etches away the TiN oxide from the TiN surface and continues to etch the TiN barrier layer while at the same time allowing the Pd to be deposited in situ. 8,12 The two-step chemical reaction can be summarized as 8…”

Section: Methodsmentioning

confidence: 99%

Classification of Palladium Nucleation Processes Based on Nucleus Size Distribution

Lau

Wong

Chan³

et al. 2004

J. Electrochem. Soc.

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b Chartered Semiconductor Manufacturing, Limited, 738406, Singapore Catalytic Pd nucleation is a crucial preparatory step for the activation of electroless ͑EL͒ Cu deposition. We have observed that the time evolution of catalytic Pd nucleation can be classified into stages according to the Pd nuclei density and the nucleus size distribution. We have tentatively labeled these stages as growth, secondary nucleation, and ripening. The stage identification is assisted with the observation of distribution range and semi-interquartile range. In this study we found that the smoothest EL Cu film can be achieved with Pd activation corresponding to the beginning of the ripening stage.Activation process is required to overcome the energy barrier in electroless ͑EL͒ Cu process. 1 Bindra and Roldan determined that Pd and Pt are the best catalyst in alkaline media. 2 Various activation methods have been proposed to pretreat the specimen surface for EL Cu deposition, such as excimer lamp and laser-assisted processes. 3-7 However, Dubin et al. have proposed a nonvacuum, cost-effective, contact-displacement method for the purpose of Cu bulk-fill. 1 Besides the advantages mentioned, this method provides good selectivity and good adhesion to the substrate.EL Cu deposition is initiated on the randomly distributed catalyst particles on the substrate, and the initial Cu grain structure is largely determined by the surface morphology. Patterson et al. reported that Cu morphology and grain structure are dependent on the Pd activation process and the control of the subsequent Cu plating. 8,9 Nakahara and Okinaka have also found that the properties of the seed layer determine the EL Cu morphology. 10 The nature and distribution of Pd nuclei formed during the activation process have been proven to be very important to the EL deposition behavior and deposit quality. 11 However, detailed investigations of the effect of Pd nuclei on the resultant EL film have yet to be carried out. Previous investigations showed that the roughness of EL Cu film was closely related to the Pd nuclei density and size. Pd nucleation process was categorized into three stages based on the change in Pd nucleus size and nuclei density. The stages are growth, secondary nucleation, and ripening. We report our analysis on Pd nucleation stages utilizing Pd nuclei size distributions. This corresponds well with previous analyses of nucleation stages based on nucleus size and nuclei density changes. ExperimentalA chemical vapor deposition ͑CVD͒ titanium nitride ͑TiN͒ barrier film of 250 Å was deposited on 5000 Å plasma-enhanced CVD ͑PECVD͒ SiO 2 /Si(100) substrate. Before the substrate is catalyzed, standard RCA cleaning was carried out to remove the organic and inorganic contaminants. The removal of organic and inorganic contaminants was done with the following solutions: ͑i͒ H 2 O:H 2 O 2 :NH 4 OH 5:1:1 and (ii) H 2 O:HCl:H 2 O 2 6:1:1, respectively, at room temperature. A 10 Ϫ3 M combined Pd/HF solution used in this study was proposed by Patterson et al. 8 The HF etch...

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Section: Methodsmentioning

confidence: 99%

Classification of Palladium Nucleation Processes Based on Nucleus Size Distribution

Lau

Wong

Chan³

et al. 2004

J. Electrochem. Soc.

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“…One example is the application of Pd-based colloidal particles as activator to initiate electroless copper deposition which is an important process in circuitry formation for PCB and other electronic devices [11][12][13][14]. In the activation step, the colloidal activator will adsorb onto the insulating substrate and initiate subsequent electroless metal deposition.…”

Section: Introductionmentioning

confidence: 99%

Synthesis of Ag/Pd nanoparticles via reactive micelles as templates and its application to electroless copper deposition

Yang

Wan

Wang

2004

Journal of Colloid and Interface Science

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“…Generally, the seed particles, produced using the sensitization/activation, displacement, or other related processes, tend to form aggregates exceeding 20 nm. 13,21,22 Thus, these methods are generally incapable of initiating the plating of electroless barriers of extremely fine thickness ͑e.g., р20 nm͒. Given the results just presented, clearly, it is possible to fabricate electroless barriers of thickness only 20 nm or even less using this all-electrochemical integrated plating technique by properly optimizing the surface activating procedure.…”

Section: Resultsmentioning

confidence: 99%

Self-Aligned Deposition Process for Ultrathin Electroless Barriers and Copper Films on Low-k Dielectric Films

Chen

Louh

et al. 2004

Electrochem. Solid-State Lett.

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A self-aligned, integrated plating technique based on plasma physics and colloidal-related chemistry is proposed to fabricate patterns of ultrathin ͑р20 nm͒ Co-based barriers and copper films in a selective manner on dielectric ͑HOSP™ and SiO 2 ) films using electroless plating. High-resolution X-ray absorption spectroscopy, transmission electron microscopy, and atomic force microscopy reveal that, once properly pretreated by a gaseous plasma (O 2 or H 2 /N 2 ) and hydrogen peroxide (H 2 O 2 ) in a basic aqueous solution, the dielectric films can adsorb highly populated metallic ͑Ni͒ precipitates of sizes approximately from 2 to 4 nm to catalyze the deposition of electroless Co-based barriers. Finally, the capability of this technique to fabricate ''self-aligned'' patterns of barrier and copper is demonstrated and the importance of the plasma pretreatment and hydrogen peroxide ͑in SC-1 solution͒ is discussed.One solution to improve the performance of microprocessors is the implementation of copper as the interconnect metal and low dielectric constant ͑low-k͒ films as the isolating medium, enabling chips to operate with low resistance-capacitance ͑RC͒ delay and cross-talk noise, and reduced power comsuption. 1 Currently, the copper wire is deposited primarily by electrochemical plating such as electroplating and electroless plating. 2,3 However, because copper is highly diffusive and drifting in the surrounding dielectrics even at low temperatures ͑ϳ200°C͒, 4,5 a highly conducting diffusion/drift barrier layer with substantially reduced thickness typically less than ϳ20 nm must be used to separate the Cu and dielectric films. 6 Apart from sputter and chemical vapor deposited transition metal nitride/ carbide thin films ͑TiN, TaN, TiSiN, TaC͒, 7-10 electrolessly plated metal-based ͑Ni-and Co-͒ barriers are receiving extensive attention because of their proven barrier properties of Cu for dielectric layers and Si, improved gap-filling capability, reduced electrical resistivity, and simplified process flow for Cu deposition. 3,11,12 However, due to the dissimilar surfaces of the substrates ͑dielec-tric and nitride/carbide barriers͒ generally lacking catalytic properties, a seeding treatment or surface modification must be invoked to initiate the deposition of electroless barriers or Cu. Traditionally, predeposition of catalyst is obtained by sensitizing and activating in tin-palladium colloidal solutions, 12 activating in tin-free PdCl 2 acidic solutions, 13 or UV-inducing copolymer-grafting molecular modification, 14 thereby forming disjointed catalytic sites on the surface to be metallized. ͑See Ref. 15 for the general methods to form seed layers for the fabrication of copper circuits.͒ However, the major challenge of using electroless plating for circuit fabrication has been the selective patterning of the seed layer, which is further complicated by the requirement of an underlying diffusion barrier. 15,16 In this regard, we present the design of a simple ͑all-electrochemical integrated͒ process using a seeding pr...

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Room temperature electroless plating copper seed layer process for damascene interlevel metal structures

Cited by 51 publications

References 8 publications

Classification of Palladium Nucleation Processes Based on Nucleus Size Distribution

Classification of Palladium Nucleation Processes Based on Nucleus Size Distribution

Synthesis of Ag/Pd nanoparticles via reactive micelles as templates and its application to electroless copper deposition

Self-Aligned Deposition Process for Ultrathin Electroless Barriers and Copper Films on Low-k Dielectric Films

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